* Freescale SGTL5000 Stereo Codec

Required properties:
- compatible : "fsl,sgtl5000".

- reg : the I2C address of the device

- #sound-dai-cells: must be equal to 0

- clocks : the clock provider of SYS_MCLK

- VDDA-supply : the regulator provider of VDDA

- VDDIO-supply: the regulator provider of VDDIO

Optional properties:

- VDDD-supply : the regulator provider of VDDD

- micbias-resistor-k-ohms : the bias resistor to be used in kOhms
	The resistor can take values of 2k, 4k or 8k.
	If set to 0 it will be off.
	If this node is not mentioned or if the value is unknown, then
	micbias	resistor is set to 4K.

- micbias-voltage-m-volts : the bias voltage to be used in mVolts
	The voltage can take values from 1.25V to 3V by 250mV steps
	If this node is not mentioned or the value is unknown, then
	the value is set to 1.25V.

- lrclk-strength: the LRCLK pad strength. Possible values are:
0, 1, 2 and 3 as per the table below:

VDDIO		1.8V		2.5V		3.3V
0 = 		Disable
1 =		1.66 mA		2.87 mA		4.02  mA
2 =		3.33 mA		5.74 mA		8.03  mA
3 =		4.99 mA		8.61 mA		12.05 mA

Example:

sgtl5000: codec@a {
	compatible = "fsl,sgtl5000";
	reg = <0x0a>;
	#sound-dai-cells = <0>;
	clocks = <&clks 150>;
	micbias-resistor-k-ohms = <2>;
	micbias-voltage-m-volts = <2250>;
	VDDA-supply = <&reg_3p3v>;
	VDDIO-supply = <&reg_3p3v>;
};
