Xilinx AXI/PLB soft-core watchdog Device Tree Bindings
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Required properties:
- compatible		: Should be "xlnx,xps-timebase-wdt-1.00.a" or
			  "xlnx,xps-timebase-wdt-1.01.a".
- reg			: Physical base address and size

Optional properties:
- clocks		: Input clock specifier. Refer to common clock
			  bindings.
- clock-frequency	: Frequency of clock in Hz
- xlnx,wdt-enable-once	: 0 - Watchdog can be restarted
			  1 - Watchdog can be enabled just once
- xlnx,wdt-interval	: Watchdog timeout interval in 2^<val> clock cycles,
			  <val> is integer from 8 to 31.

Example:
axi-timebase-wdt@40100000 {
	clock-frequency = <50000000>;
	compatible = "xlnx,xps-timebase-wdt-1.00.a";
	clocks = <&clkc 15>;
	reg = <0x40100000 0x10000>;
	xlnx,wdt-enable-once = <0x0>;
	xlnx,wdt-interval = <0x1b>;
} ;
