Mediatek 65xx/81xx sysirq

Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
interrupt.

Required properties:
- compatible: should be one of:
	"mediatek,mt8173-sysirq"
	"mediatek,mt8135-sysirq"
	"mediatek,mt8127-sysirq"
	"mediatek,mt6592-sysirq"
	"mediatek,mt6589-sysirq"
	"mediatek,mt6582-sysirq"
	"mediatek,mt6577-sysirq"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Use the same format as specified by GIC in
  Documentation/devicetree/bindings/arm/gic.txt
- interrupt-parent: phandle of irq parent for sysirq. The parent must
  use the same interrupt-cells format as GIC.
- reg: Physical base address of the intpol registers and length of memory
  mapped region.

Example:
	sysirq: interrupt-controller@10200100 {
		compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq";
		interrupt-controller;
		#interrupt-cells = <3>;
		interrupt-parent = <&gic>;
		reg = <0 0x10200100 0 0x1c>;
	};
