Analog Device ADV7511(W)/13/33 HDMI Encoders
-----------------------------------------

The ADV7511, ADV7511W, ADV7513 and ADV7533 are HDMI audio and video transmitters
compatible with HDMI 1.4 and DVI 1.0. They support color space conversion,
S/PDIF, CEC and HDCP. ADV7533 supports the DSI interface for input pixels, while
the others support RGB interface.

Required properties:

- compatible: Should be one of:
		"adi,adv7511"
		"adi,adv7511w"
		"adi,adv7513"
		"adi,adv7533"

- reg: I2C slave address

The ADV7511 supports a large number of input data formats that differ by their
color depth, color format, clock mode, bit justification and random
arrangement of components on the data bus. The combination of the following
properties describe the input and map directly to the video input tables of the
ADV7511 datasheet that document all the supported combinations.

- adi,input-depth: Number of bits per color component at the input (8, 10 or
  12).
- adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
  "yuv444".
- adi,input-clock: The input clock type, one of "1x" (one clock cycle per
  pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
  data driven on both edges).

The following input format properties are required except in "rgb 1x" and
"yuv444 1x" modes, in which case they must not be specified.

- adi,input-style: The input components arrangement variant (1, 2 or 3), as
  listed in the input format tables in the datasheet.
- adi,input-justification: The input bit justification ("left", "evenly",
  "right").

The following properties are required for ADV7533:

- adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should
  be one of 1, 2, 3 or 4.

Optional properties:

- interrupts: Specifier for the ADV7511 interrupt
- pd-gpios: Specifier for the GPIO connected to the power down signal

- adi,clock-delay: Video data clock delay relative to the pixel clock, in ps
  (-1200 ps .. 1600 ps). Defaults to no delay.
- adi,embedded-sync: The input uses synchronization signals embedded in the
  data stream (similar to BT.656). Defaults to separate H/V synchronization
  signals.
- adi,disable-timing-generator: Only for ADV7533. Disables the internal timing
  generator. The chip will rely on the sync signals in the DSI data lanes,
  rather than generate its own timings for HDMI output.

Required nodes:

The ADV7511 has two video ports. Their connections are modelled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.

- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533, the
  remote endpoint phandle should be a reference to a valid mipi_dsi_host device
  node.
- Video port 1 for the HDMI output


Example
-------

	adv7511w: hdmi@39 {
		compatible = "adi,adv7511w";
		reg = <39>;
		interrupt-parent = <&gpio3>;
		interrupts = <29 IRQ_TYPE_EDGE_FALLING>;

		adi,input-depth = <8>;
		adi,input-colorspace = "rgb";
		adi,input-clock = "1x";
		adi,input-style = <1>;
		adi,input-justification = "evenly";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				adv7511w_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;
				adv7511_out: endpoint {
					remote-endpoint = <&hdmi_connector_in>;
				};
			};
		};
	};
