Binding for a type of STMicroelectronics clock crossbar (VCC).

The crossbar can take up to 4 input clocks and control up to 16
output clocks. Not all inputs or outputs have to be in use in a
particular instantiation. Each output can be individually enabled,
select any of the input clocks and apply a divide (by 1,2,4 or 8) to
that selected clock.

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:

- compatible : shall be:
	"st,stih416-clkgenc",		"st,vcc"
	"st,stih416-clkgenf",		"st,vcc"

- #clock-cells : from common clock binding; shall be set to 1.

- reg : A Base address and length of the register set.

- clocks : from common clock binding

- clock-output-names : From common clock binding. The block has 16
                       clock outputs but not all of them in a specific instance
                       have to be used in the SoC. If a clock name is left as
                       an empty string then no clock will be created for the
                       output associated with that string index. If fewer than
                       16 strings are provided then no clocks will be created
                       for the remaining outputs.

Example:

	CLOCKGEN_C_VCC: CLOCKGEN_C_VCC {
		#clock-cells = <1>;
		compatible = "st,stih416-clkgenc", "st,clkgen-vcc";
		reg = <0xfe8308ac 12>;

		clocks = <&CLK_S_VCC_HD>, <&CLOCKGEN_C 1>,
			<&CLK_S_TMDS_FROMPHY>, <&CLOCKGEN_C 2>;

		clock-output-names  =
			"CLK_S_PIX_HDMI",  "CLK_S_PIX_DVO",
			"CLK_S_OUT_DVO",   "CLK_S_PIX_HD",
			"CLK_S_HDDAC",     "CLK_S_DENC",
			"CLK_S_SDDAC",     "CLK_S_PIX_MAIN",
			"CLK_S_PIX_AUX",   "CLK_S_STFE_FRC_0",
			"CLK_S_REF_MCRU",  "CLK_S_SLAVE_MCRU",
			"CLK_S_TMDS_HDMI", "CLK_S_HDMI_REJECT_PLL",
			"CLK_S_THSENS";
	};

