• Andre Przywara's avatar
    net: axienet: Upgrade descriptors to hold 64-bit addresses · 4e958f33
    Andre Przywara authored
    Newer revisions of the AXI DMA IP (>= v7.1) support 64-bit addresses,
    both for the descriptors itself, as well as for the buffers they are
    pointing to.
    This is realised by adding "MSB" words for the next and phys pointer
    right behind the existing address word, now named "LSB". These MSB words
    live in formerly reserved areas of the descriptor.
    
    If the hardware supports it, write both words when setting an address.
    The buffer address is handled by two wrapper functions, the two
    occasions where we set the next pointers are open coded.
    
    For now this is guarded by a flag which we don't set yet.
    Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    4e958f33
xilinx_axienet_main.c 59.5 KB