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Tang Yuantian authored
This adds the clock driver for Freescale PowerPC corenet series SoCs using common clock infrastructure. Signed-off-by:
Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by:
Li Yang <leoli@freescale.com> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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