• Imre Deak's avatar
    drm/i915/tgl: Add power well support · 656409bb
    Imre Deak authored
    The patch adds the new power wells introduced by TGL (GEN 12) and
    maps these to existing/new power domains. The changes for GEN 12 wrt
    to GEN 11 are the following:
    
    - Transcoder#EDP removed from power well#1 (Transcoder#A used in
      low-power mode instead)
    - Transcoder#A is now backed by power well#1 instead of power well#3
    - The DDI#B/C combo PHY ports are now backed by power well#1 instead of
      power well#3
    - New power well#5 added for pipe#D functionality (TODO)
    - 2 additional TC ports (TC#5-6) backed by power well#3, 2 port
      specific IO power wells (only for the non-TBT modes) and 4 port
      specific AUX power wells (2-2 for TBT vs. non-TBT modes)
    - Power well#2 backs now VDSC/joining for pipe#A instead of VDSC for
      eDP and MIPI DSI (TODO)
    
    On TGL Port DDI#C changed to be a combo PHY (native DP/HDMI) and
    BSpec has renamed ports DDI#D-F to TC#4-6 respectively. Thus on ICL we
    have the following naming for ports:
    
    - Combo PHYs (native DP/HDMI):
      DDI#A-B
    - TBT/non-TBT (TC altmode, native DP/HDMI) PHYs:
      DDI#C-F
    
    Starting from GEN 12 we have the following naming for ports:
    - Combo PHYs (native DP/HDMI):
      DDI#A-C
    - TBT/non-TBT (TC altmode, native DP/HDMI) PHYs:
      DDI TC#1-6
    
    To save some space in the power domain enum the power domain naming in
    the driver reflects the above change, that is power domains TC#1-3 are
    added as aliases for DDI#D-F and new power domains are reserved for
    TC#4-6.
    
    v2 (Lucas):
      - Separate out the bits and definitions for TGL from the ICL ones.
        Fix use of TRANSCODER_EDP_VDSC, that is now the correct define since
        we don't define TRANSCODER_A_VDSC power domain to spare a one bit in
        the bitmask (suggested by Ville)
    v3 (Lucas):
      - Fix missing squashes on v2
      - Rebase on renamed TRANSCODER_EDP_VDSC
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
    Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
    Cc: José Roberto de Souza <jose.souza@intel.com>
    Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
    Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
    Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-9-lucas.demarchi@intel.com
    656409bb
intel_display_power.h 10.2 KB