• Anton Blanchard's avatar
    powerpc: Ignore reserved field in DCSR and PVR reads and writes · a583f481
    Anton Blanchard authored
    commit 178f3582 upstream.
    
    IBM bit 31 (for the rest of us - bit 0) is a reserved field in the
    instruction definition of mtspr and mfspr. Hardware is encouraged to
    (and does) ignore it.
    
    As a result, if userspace executes an mtspr DSCR with the reserved bit
    set, we get a DSCR facility unavailable exception. The kernel fails to
    match against the expected value/mask, and we silently return to
    userspace to try and re-execute the same mtspr DSCR instruction. We
    loop forever until the process is killed.
    
    We should do something here, and it seems mirroring what hardware does
    is the better option vs killing the process. While here, relax the
    matching of mfspr PVR too.
    Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    Signed-off-by: default avatarBen Hutchings <ben@decadent.org.uk>
    a583f481
ppc-opcode.h 12.4 KB