• Daniel Vetter's avatar
    drm/i915: hw state readout for shared pch plls · c0d43d62
    Daniel Vetter authored
    Well, the first step of a long road at least, it only reads out
    the pipe -> shared dpll association thus far. Other state which needs
    to follow:
    
    - hw state of the dpll (on/off + dpll registers). Currently we just
      read that out from the hw state, but that doesn't work too well when
      the dpll is in use, but not yet fully enabled. We get away since
      most likely it already has been enabled and so the correct state is
      left behind in the registers. But that doesn't hold for atomic
      modesets when we want to enable all pipes at once.
    
    - Refcount reconstruction for each dpll.
    
    - Cross-checking of all the above. For that we need to keep the dpll
      register state both in the pipe and in the shared_dpll struct, so
      that we can check that every pipe is still connected to a correctly
      configured dpll.
    
    Note that since the refcount resconstruction isn't done yet this will
    spill a few WARNs at boot-up while trying to disable pch plls which
    have bogus refcounts. But since there's still a pile of refactoring to
    do I'd like to lock down the state handling as soon as possible hence
    decided against reordering the patches to quiet these WARNs - after
    all the issues they're complaining about have existed since forever,
    as Jesse can testify by having pch pll states blow up consistently in
    his fastboot patches ...
    
    v2: We need to preserve the old shared_dpll since currently the
    shared dpll refcount dropping/getting is done in ->mode_set. With
    the usual pipe_config infrastructure the old dpll id is already lost
    at that point, hence preserve it in the new config.
    
    v3: Rebase on top of the ips patch from Paulo.
    
    v4: We need to unconditionally take over the shared_dpll id from the
    old pipe config when e.g. doing a direct pch port -> cpu edp
    transition.
    
    v5: Move the saving of the old shared_dpll id to an ealier patch.
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    c0d43d62
intel_display.c 270 KB