• Sylwester Nawrocki's avatar
    drm/exynos: rework fimc clocks handling · e5f86839
    Sylwester Nawrocki authored
    The clocks handling is refactored and a "mux" clock handling is
    added to account for changes in the clocks driver. After switching
    to the common clock framework the sclk_fimc clock is now split
    into two clocks: a gate and a mux clock. In order to retain the
    exisiting functionality two additional consumer clocks are passed
    to the driver from device tree: "mux" and "parent". Then the driver
    sets "parent" clock as a parent clock of the "mux" clock. These two
    additional clocks are optional, and should go away when there is a
    standard way of setting up parent clocks on DT platforms.
    Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
    Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
    Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
    e5f86839
exynos_drm_fimc.c 47.9 KB