Commit 001f3b03 authored by Yoshihiro Kaneko's avatar Yoshihiro Kaneko Committed by Simon Horman

arm64: dts: renesas: r8a77965: sort subnodes of the root node

Sort subnodes of the root node alphanumerically.

This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.

This should not have any run-time effect.
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 7c55747f
...@@ -22,9 +22,34 @@ aliases { ...@@ -22,9 +22,34 @@ aliases {
i2c7 = &i2c_dvfs; i2c7 = &i2c_dvfs;
}; };
psci { /*
compatible = "arm,psci-1.0", "arm,psci-0.2"; * The external audio clocks are configured as 0 Hz fixed frequency
method = "smc"; * clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock - to be overridden by boards that provide it */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
}; };
cpus { cpus {
...@@ -71,34 +96,24 @@ extalr_clk: extalr { ...@@ -71,34 +96,24 @@ extalr_clk: extalr {
clock-frequency = <0>; clock-frequency = <0>;
}; };
/* /* External PCIe clock - can be overridden by the board */
* The external audio clocks are configured as 0 Hz fixed frequency pcie_bus_clk: pcie_bus {
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
}; };
audio_clk_c: audio_clk_c { pmu_a57 {
compatible = "fixed-clock"; compatible = "arm,cortex-a57-pmu";
#clock-cells = <0>; interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
clock-frequency = <0>; <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>,
<&a57_1>;
}; };
/* External CAN clock - to be overridden by boards that provide it */ psci {
can_clk: can { compatible = "arm,psci-1.0", "arm,psci-0.2";
compatible = "fixed-clock"; method = "smc";
#clock-cells = <0>;
clock-frequency = <0>;
}; };
/* External SCIF clock - to be overridden by boards that provide it */ /* External SCIF clock - to be overridden by boards that provide it */
...@@ -108,42 +123,6 @@ scif_clk: scif { ...@@ -108,42 +123,6 @@ scif_clk: scif {
clock-frequency = <0>; clock-frequency = <0>;
}; };
/* External PCIe clock - can be overridden by the board */
pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External USB clocks - can be overridden by the board */
usb3s0_clk: usb3s0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu_a57 {
compatible = "arm,cortex-a57-pmu";
interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>,
<&a57_1>;
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
...@@ -1073,4 +1052,25 @@ wdt0: watchdog@e6020000 { ...@@ -1073,4 +1052,25 @@ wdt0: watchdog@e6020000 {
/* placeholder */ /* placeholder */
}; };
}; };
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External USB clocks - can be overridden by the board */
usb3s0_clk: usb3s0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
}; };
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