Commit 0a9ece9b authored by Randy Dunlap's avatar Randy Dunlap Committed by Tony Luck

EDAC/igen6: fix core dependency

igen6_edac needs mce_register()/unregister() functions,
so it should depend on X86_MCE (or X86_MCE_INTEL).

That change prevents these build errors:

ld: drivers/edac/igen6_edac.o: in function `igen6_remove':
igen6_edac.c:(.text+0x494): undefined reference to `mce_unregister_decode_chain'
ld: drivers/edac/igen6_edac.o: in function `igen6_probe':
igen6_edac.c:(.text+0xf5b): undefined reference to `mce_register_decode_chain'

Fixes: 10590a9d ("EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC")
Reported-by: default avatarkernel test robot <lkp@intel.com>
Signed-off-by: default avatarRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20210619160203.2026-1-rdunlap@infradead.org
parent f0a029ff
...@@ -270,7 +270,8 @@ config EDAC_PND2 ...@@ -270,7 +270,8 @@ config EDAC_PND2
config EDAC_IGEN6 config EDAC_IGEN6
tristate "Intel client SoC Integrated MC" tristate "Intel client SoC Integrated MC"
depends on PCI && X86_64 && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG depends on PCI && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
depends on X64_64 && X86_MCE_INTEL
help help
Support for error detection and correction on the Intel Support for error detection and correction on the Intel
client SoC Integrated Memory Controller using In-Band ECC IP. client SoC Integrated Memory Controller using In-Band ECC IP.
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment