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Commit 0aaafb73 authored by Mario Limonciello's avatar Mario Limonciello Committed by Alex Deucher
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drm/amd: Use `amdgpu_ucode_*` helpers for GFX8 

The `amdgpu_ucode_request` helper will ensure that the return code for
missing firmware is -ENODEV so that early_init can fail.

The `amdgpu_ucode_release` helper is for symmetry on unloading.
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 469f199e
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Inline Side-by-side
Showing with 33 additions and 61 deletions
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
View file @ 0aaafb73
...@@ -924,20 +924,14 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) ...@@ -924,20 +924,14 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
static void gfx_v8_0_free_microcode(struct amdgpu_device *adev) static void gfx_v8_0_free_microcode(struct amdgpu_device *adev)
{ {
release_firmware(adev->gfx.pfp_fw); amdgpu_ucode_release(&adev->gfx.pfp_fw);
adev->gfx.pfp_fw = NULL; amdgpu_ucode_release(&adev->gfx.me_fw);
release_firmware(adev->gfx.me_fw); amdgpu_ucode_release(&adev->gfx.ce_fw);
adev->gfx.me_fw = NULL; amdgpu_ucode_release(&adev->gfx.rlc_fw);
release_firmware(adev->gfx.ce_fw); amdgpu_ucode_release(&adev->gfx.mec_fw);
adev->gfx.ce_fw = NULL;
release_firmware(adev->gfx.rlc_fw);
adev->gfx.rlc_fw = NULL;
release_firmware(adev->gfx.mec_fw);
adev->gfx.mec_fw = NULL;
if ((adev->asic_type != CHIP_STONEY) && if ((adev->asic_type != CHIP_STONEY) &&
(adev->asic_type != CHIP_TOPAZ)) (adev->asic_type != CHIP_TOPAZ))
release_firmware(adev->gfx.mec2_fw); amdgpu_ucode_release(&adev->gfx.mec2_fw);
adev->gfx.mec2_fw = NULL;
kfree(adev->gfx.rlc.register_list_format); kfree(adev->gfx.rlc.register_list_format);
} }
...@@ -989,18 +983,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) ...@@ -989,18 +983,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp_2.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp_2.bin", chip_name);
err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw, fw_name);
if (err == -ENOENT) { if (err == -ENODEV) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", chip_name);
err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw, fw_name);
} }
} else { } else {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", chip_name);
err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw, fw_name);
} }
if (err)
goto out;
err = amdgpu_ucode_validate(adev->gfx.pfp_fw);
if (err) if (err)
goto out; goto out;
cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data;
...@@ -1009,18 +1000,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) ...@@ -1009,18 +1000,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me_2.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me_2.bin", chip_name);
err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.me_fw, fw_name);
if (err == -ENOENT) { if (err == -ENODEV) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name);
err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.me_fw, fw_name);
} }
} else { } else {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name);
err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.me_fw, fw_name);
} }
if (err)
goto out;
err = amdgpu_ucode_validate(adev->gfx.me_fw);
if (err) if (err)
goto out; goto out;
cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data;
...@@ -1030,18 +1018,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) ...@@ -1030,18 +1018,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce_2.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce_2.bin", chip_name);
err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw, fw_name);
if (err == -ENOENT) { if (err == -ENODEV) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name);
err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw, fw_name);
} }
} else { } else {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name);
err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw, fw_name);
} }
if (err)
goto out;
err = amdgpu_ucode_validate(adev->gfx.ce_fw);
if (err) if (err)
goto out; goto out;
cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data;
...@@ -1060,10 +1045,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) ...@@ -1060,10 +1045,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
adev->virt.chained_ib_support = false; adev->virt.chained_ib_support = false;
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw, fw_name);
if (err) if (err)
goto out; goto out;
err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);
adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);
...@@ -1110,18 +1094,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) ...@@ -1110,18 +1094,15 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec_2.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec_2.bin", chip_name);
err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw, fw_name);
if (err == -ENOENT) { if (err == -ENODEV) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name);
err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw, fw_name);
} }
} else { } else {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name);
err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw, fw_name);
} }
if (err)
goto out;
err = amdgpu_ucode_validate(adev->gfx.mec_fw);
if (err) if (err)
goto out; goto out;
cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
...@@ -1132,19 +1113,16 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) ...@@ -1132,19 +1113,16 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
(adev->asic_type != CHIP_TOPAZ)) { (adev->asic_type != CHIP_TOPAZ)) {
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2_2.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2_2.bin", chip_name);
err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw, fw_name);
if (err == -ENOENT) { if (err == -ENODEV) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw, fw_name);
} }
} else { } else {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw, fw_name);
} }
if (!err) { if (!err) {
err = amdgpu_ucode_validate(adev->gfx.mec2_fw);
if (err)
goto out;
cp_hdr = (const struct gfx_firmware_header_v1_0 *) cp_hdr = (const struct gfx_firmware_header_v1_0 *)
adev->gfx.mec2_fw->data; adev->gfx.mec2_fw->data;
adev->gfx.mec2_fw_version = adev->gfx.mec2_fw_version =
...@@ -1219,18 +1197,12 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) ...@@ -1219,18 +1197,12 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
dev_err(adev->dev, dev_err(adev->dev,
"gfx8: Failed to load firmware \"%s\"\n", "gfx8: Failed to load firmware \"%s\"\n",
fw_name); fw_name);
release_firmware(adev->gfx.pfp_fw); amdgpu_ucode_release(&adev->gfx.pfp_fw);
adev->gfx.pfp_fw = NULL; amdgpu_ucode_release(&adev->gfx.me_fw);
release_firmware(adev->gfx.me_fw); amdgpu_ucode_release(&adev->gfx.ce_fw);
adev->gfx.me_fw = NULL; amdgpu_ucode_release(&adev->gfx.rlc_fw);
release_firmware(adev->gfx.ce_fw); amdgpu_ucode_release(&adev->gfx.mec_fw);
adev->gfx.ce_fw = NULL; amdgpu_ucode_release(&adev->gfx.mec2_fw);
release_firmware(adev->gfx.rlc_fw);
adev->gfx.rlc_fw = NULL;
release_firmware(adev->gfx.mec_fw);
adev->gfx.mec_fw = NULL;
release_firmware(adev->gfx.mec2_fw);
adev->gfx.mec2_fw = NULL;
} }
return err; return err;
} }
......
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