Commit 0ac7200e authored by Prashant Malani's avatar Prashant Malani

Revert "mfd: cros_ec: Add SCP Core-1 as a new CrOS EC MCU"

This reverts commit 66ee379d.

The feature flag introduced by Commit 66ee379d ("mfd: cros_ec: Add
SCP Core-1 as a new CrOS EC MCU") was not first added in the source EC
code base[1]. This can lead to the possible misinterpration of an EC's
supported feature set, as well as causes issues with all future feature
flag updates.

[1] https://source.chromium.org/chromium/chromiumos/platform/ec/+/main:include/ec_commands.hSigned-off-by: default avatarPrashant Malani <pmalani@chromium.org>
Acked-by: default avatarLee Jones <lee@kernel.org>
Reviewed-by: default avatarBenson Leung <bleung@chromium.org>
Acked-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20221228004648.793339-2-pmalani@chromium.org
parent 957445d7
......@@ -64,11 +64,6 @@ static const struct cros_feature_to_name cros_mcu_devices[] = {
.name = CROS_EC_DEV_SCP_NAME,
.desc = "System Control Processor",
},
{
.id = EC_FEATURE_SCP_C1,
.name = CROS_EC_DEV_SCP_C1_NAME,
.desc = "System Control Processor 2nd Core",
},
{
.id = EC_FEATURE_TOUCHPAD,
.name = CROS_EC_DEV_TP_NAME,
......
......@@ -1300,8 +1300,6 @@ enum ec_feature_code {
* mux.
*/
EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
/* The MCU is a System Companion Processor (SCP) 2nd Core. */
EC_FEATURE_SCP_C1 = 45,
};
#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
......
......@@ -19,7 +19,6 @@
#define CROS_EC_DEV_ISH_NAME "cros_ish"
#define CROS_EC_DEV_PD_NAME "cros_pd"
#define CROS_EC_DEV_SCP_NAME "cros_scp"
#define CROS_EC_DEV_SCP_C1_NAME "cros_scp_c1"
#define CROS_EC_DEV_TP_NAME "cros_tp"
#define CROS_EC_DEV_EC_INDEX 0
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment