Commit 13b73e1f authored by Dmitry Baryshkov's avatar Dmitry Baryshkov

drm/msm/dp: remove max_pclk_khz field from dp_panel/dp_display

Since the last commit, the max_pclk_khz became constant, it's set to
DP_MAX_PIXEL_CLK_KHZ and never changed afterwards. Remove it completely
and use DP_MAX_PIXEL_CLK_KHZ directly.
Reviewed-by: default avatarKuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/480139/
Link: https://lore.kernel.org/r/20220330223008.649274-4-dmitry.baryshkov@linaro.org
[DB: applied a fix to follow connector->bridge conversion]
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent a52bfaf6
......@@ -44,8 +44,6 @@ static int dp_debug_show(struct seq_file *seq, void *p)
drm_mode = &debug->panel->dp_mode.drm_mode;
seq_printf(seq, "\tname = %s\n", DEBUG_NAME);
seq_printf(seq, "\tdp_panel\n\t\tmax_pclk_khz = %d\n",
debug->panel->max_pclk_khz);
seq_printf(seq, "\tdrm_dp_link\n\t\trate = %u\n",
debug->panel->link_info.rate);
seq_printf(seq, "\t\tnum_lanes = %u\n",
......
......@@ -377,7 +377,6 @@ static int dp_display_process_hpd_high(struct dp_display_private *dp)
dp->audio_supported = drm_detect_monitor_audio(edid);
dp_panel_handle_sink_request(dp->panel);
dp->dp_display.max_pclk_khz = DP_MAX_PIXEL_CLK_KHZ;
dp->dp_display.max_dp_lanes = dp->parser->max_dp_lanes;
/*
......@@ -1006,9 +1005,7 @@ enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge,
return -EINVAL;
}
if ((dp->max_pclk_khz <= 0) ||
(dp->max_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) ||
(mode->clock > dp->max_pclk_khz))
if (mode->clock > DP_MAX_PIXEL_CLK_KHZ)
return MODE_BAD;
dp_display = container_of(dp, struct dp_display_private, dp_display);
......
......@@ -26,8 +26,6 @@ struct msm_dp {
bool wide_bus_en;
u32 max_pclk_khz;
u32 max_dp_lanes;
struct dp_audio *dp_audio;
};
......
......@@ -49,7 +49,6 @@ struct dp_panel {
bool video_test;
u32 vic;
u32 max_pclk_khz;
u32 max_dp_lanes;
u32 max_bw_code;
......
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