Commit 170d6e94 authored by Eric Huang's avatar Eric Huang Committed by Alex Deucher

drm/amdgpu: enable GFX/UVD/VCE PG for Bristol

Signed-off-by: default avatarEric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: default avatarSamuel Li <Samuel.Li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d1aff8ec
...@@ -910,6 +910,9 @@ static const struct amdgpu_asic_funcs vi_asic_funcs = ...@@ -910,6 +910,9 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
.get_config_memsize = &vi_get_config_memsize, .get_config_memsize = &vi_get_config_memsize,
}; };
#define CZ_REV_BRISTOL(rev) \
((rev >= 0xC8 && rev <= 0xCE) || (rev >= 0xE1 && rev <= 0xE6))
static int vi_common_early_init(void *handle) static int vi_common_early_init(void *handle)
{ {
bool smc_enabled = false; bool smc_enabled = false;
...@@ -1057,7 +1060,7 @@ static int vi_common_early_init(void *handle) ...@@ -1057,7 +1060,7 @@ static int vi_common_early_init(void *handle)
AMD_CG_SUPPORT_VCE_MGCG; AMD_CG_SUPPORT_VCE_MGCG;
/* rev0 hardware requires workarounds to support PG */ /* rev0 hardware requires workarounds to support PG */
adev->pg_flags = 0; adev->pg_flags = 0;
if (adev->rev_id != 0x00) { if (adev->rev_id != 0x00 || CZ_REV_BRISTOL(adev->pdev->revision)) {
adev->pg_flags |= adev->pg_flags |=
AMD_PG_SUPPORT_GFX_SMG | AMD_PG_SUPPORT_GFX_SMG |
AMD_PG_SUPPORT_GFX_PIPELINE | AMD_PG_SUPPORT_GFX_PIPELINE |
......
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