Commit 1d8ca002 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Add PORT_TCn aliases to enum port

Since tgl the DDIs have been named A,B,C,TC1,TC2,TC3...
Add the appropriate enum values for the TC DDIs to enum port.

v2: Deal with rkl and dg1
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-3-ville.syrjala@linux.intel.com
parent 320c670c
...@@ -1688,17 +1688,15 @@ static enum port dvo_port_to_port(struct drm_i915_private *dev_priv, ...@@ -1688,17 +1688,15 @@ static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
}; };
/* /*
* Bspec lists the ports as A, B, C, D - however internally in our * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
* driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the * map to DDI A,B,TC1,TC2 respectively.
* registers in Display Engine match the right offsets. Apply the
* mapping here to translate from VBT to internal convention.
*/ */
static const int rkl_port_mapping[][3] = { static const int rkl_port_mapping[][3] = {
[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
[PORT_C] = { -1 }, [PORT_C] = { -1 },
[PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
[PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
}; };
if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
......
...@@ -5069,8 +5069,8 @@ static bool hti_uses_phy(struct drm_i915_private *i915, enum phy phy) ...@@ -5069,8 +5069,8 @@ static bool hti_uses_phy(struct drm_i915_private *i915, enum phy phy)
static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv, static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv,
enum port port) enum port port)
{ {
if (port >= PORT_D) if (port >= PORT_TC1)
return HPD_PORT_C + port - PORT_D; return HPD_PORT_C + port - PORT_TC1;
else else
return HPD_PORT_A + port - PORT_A; return HPD_PORT_A + port - PORT_A;
} }
...@@ -5078,8 +5078,8 @@ static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv, ...@@ -5078,8 +5078,8 @@ static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv,
static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv, static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
enum port port) enum port port)
{ {
if (port >= PORT_D) if (port >= PORT_TC1)
return HPD_PORT_TC1 + port - PORT_D; return HPD_PORT_TC1 + port - PORT_TC1;
else else
return HPD_PORT_A + port - PORT_A; return HPD_PORT_A + port - PORT_A;
} }
...@@ -5090,8 +5090,8 @@ static enum hpd_pin rkl_hpd_pin(struct drm_i915_private *dev_priv, ...@@ -5090,8 +5090,8 @@ static enum hpd_pin rkl_hpd_pin(struct drm_i915_private *dev_priv,
if (HAS_PCH_TGP(dev_priv)) if (HAS_PCH_TGP(dev_priv))
return tgl_hpd_pin(dev_priv, port); return tgl_hpd_pin(dev_priv, port);
if (port >= PORT_D) if (port >= PORT_TC1)
return HPD_PORT_C + port - PORT_D; return HPD_PORT_C + port - PORT_TC1;
else else
return HPD_PORT_A + port - PORT_A; return HPD_PORT_A + port - PORT_A;
} }
......
...@@ -7463,12 +7463,12 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy) ...@@ -7463,12 +7463,12 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port) enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port)
{ {
if (IS_ROCKETLAKE(i915) && port >= PORT_D) if (IS_ROCKETLAKE(i915) && port >= PORT_TC1)
return (enum phy)port - 1; return PHY_C + port - PORT_TC1;
else if (IS_JSL_EHL(i915) && port == PORT_D) else if (IS_JSL_EHL(i915) && port == PORT_D)
return PHY_A; return PHY_A;
return (enum phy)port; return PHY_A + port - PORT_A;
} }
enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port) enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port)
...@@ -7477,9 +7477,9 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port) ...@@ -7477,9 +7477,9 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port)
return TC_PORT_NONE; return TC_PORT_NONE;
if (INTEL_GEN(dev_priv) >= 12) if (INTEL_GEN(dev_priv) >= 12)
return port - PORT_D; return TC_PORT_1 + port - PORT_TC1;
else
return port - PORT_C; return TC_PORT_1 + port - PORT_C;
} }
enum intel_display_power_domain intel_port_to_power_domain(enum port port) enum intel_display_power_domain intel_port_to_power_domain(enum port port)
...@@ -17222,17 +17222,17 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) ...@@ -17222,17 +17222,17 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (IS_ROCKETLAKE(dev_priv)) { if (IS_ROCKETLAKE(dev_priv)) {
intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_A);
intel_ddi_init(dev_priv, PORT_B); intel_ddi_init(dev_priv, PORT_B);
intel_ddi_init(dev_priv, PORT_D); /* DDI TC1 */ intel_ddi_init(dev_priv, PORT_TC1);
intel_ddi_init(dev_priv, PORT_E); /* DDI TC2 */ intel_ddi_init(dev_priv, PORT_TC2);
} else if (INTEL_GEN(dev_priv) >= 12) { } else if (INTEL_GEN(dev_priv) >= 12) {
intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_A);
intel_ddi_init(dev_priv, PORT_B); intel_ddi_init(dev_priv, PORT_B);
intel_ddi_init(dev_priv, PORT_D); intel_ddi_init(dev_priv, PORT_TC1);
intel_ddi_init(dev_priv, PORT_E); intel_ddi_init(dev_priv, PORT_TC2);
intel_ddi_init(dev_priv, PORT_F); intel_ddi_init(dev_priv, PORT_TC2);
intel_ddi_init(dev_priv, PORT_G); intel_ddi_init(dev_priv, PORT_TC4);
intel_ddi_init(dev_priv, PORT_H); intel_ddi_init(dev_priv, PORT_TC5);
intel_ddi_init(dev_priv, PORT_I); intel_ddi_init(dev_priv, PORT_TC6);
icl_dsi_init(dev_priv); icl_dsi_init(dev_priv);
} else if (IS_JSL_EHL(dev_priv)) { } else if (IS_JSL_EHL(dev_priv)) {
intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_A);
......
...@@ -208,6 +208,14 @@ enum port { ...@@ -208,6 +208,14 @@ enum port {
PORT_H, PORT_H,
PORT_I, PORT_I,
/* tgl+ */
PORT_TC1 = PORT_D,
PORT_TC2,
PORT_TC3,
PORT_TC4,
PORT_TC5,
PORT_TC6,
I915_MAX_PORTS I915_MAX_PORTS
}; };
......
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