Commit 269f399d authored by Matus Gajdos's avatar Matus Gajdos Committed by Mark Brown

ASoC: fsl_sai: Disable bit clock with transmitter

Otherwise bit clock remains running writing invalid data to the DAC.
Signed-off-by: default avatarMatus Gajdos <matuszpd@gmail.com>
Acked-by: default avatarShengjiu Wang <shengjiu.wang@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230712124934.32232-1-matuszpd@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 469e2f28
...@@ -713,7 +713,7 @@ static void fsl_sai_config_disable(struct fsl_sai *sai, int dir) ...@@ -713,7 +713,7 @@ static void fsl_sai_config_disable(struct fsl_sai *sai, int dir)
u32 xcsr, count = 100; u32 xcsr, count = 100;
regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),
FSL_SAI_CSR_TERE, 0); FSL_SAI_CSR_TERE | FSL_SAI_CSR_BCE, 0);
/* TERE will remain set till the end of current frame */ /* TERE will remain set till the end of current frame */
do { do {
......
...@@ -91,6 +91,7 @@ ...@@ -91,6 +91,7 @@
/* SAI Transmit/Receive Control Register */ /* SAI Transmit/Receive Control Register */
#define FSL_SAI_CSR_TERE BIT(31) #define FSL_SAI_CSR_TERE BIT(31)
#define FSL_SAI_CSR_SE BIT(30) #define FSL_SAI_CSR_SE BIT(30)
#define FSL_SAI_CSR_BCE BIT(28)
#define FSL_SAI_CSR_FR BIT(25) #define FSL_SAI_CSR_FR BIT(25)
#define FSL_SAI_CSR_SR BIT(24) #define FSL_SAI_CSR_SR BIT(24)
#define FSL_SAI_CSR_xF_SHIFT 16 #define FSL_SAI_CSR_xF_SHIFT 16
......
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