Commit 2cd7d393 authored by Vignesh R's avatar Vignesh R Committed by Tero Kristo

arm64: dts: ti: k3-am654: Add McSPI DT nodes

There are 3 instances of McSPI in MCU domain and 4 instances in Main domain.
Add DT nodes for all McSPI instances present on AM654 SoC.
Signed-off-by: default avatarVignesh R <vigneshr@ti.com>
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent c484fc95
...@@ -139,4 +139,56 @@ ecap0: pwm@3100000 { ...@@ -139,4 +139,56 @@ ecap0: pwm@3100000 {
clocks = <&k3_clks 39 0>; clocks = <&k3_clks 39 0>;
clock-names = "fck"; clock-names = "fck";
}; };
main_spi0: spi@2100000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x2100000 0x0 0x400>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 137 1>;
power-domains = <&k3_pds 137>;
#address-cells = <1>;
#size-cells = <0>;
};
main_spi1: spi@2110000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x2110000 0x0 0x400>;
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 138 1>;
power-domains = <&k3_pds 138>;
#address-cells = <1>;
#size-cells = <0>;
assigned-clocks = <&k3_clks 137 1>;
assigned-clock-rates = <48000000>;
};
main_spi2: spi@2120000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x2120000 0x0 0x400>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 139 1>;
power-domains = <&k3_pds 139>;
#address-cells = <1>;
#size-cells = <0>;
};
main_spi3: spi@2130000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x2130000 0x0 0x400>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 140 1>;
power-domains = <&k3_pds 140>;
#address-cells = <1>;
#size-cells = <0>;
};
main_spi4: spi@2140000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x2140000 0x0 0x400>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 141 1>;
power-domains = <&k3_pds 141>;
#address-cells = <1>;
#size-cells = <0>;
};
}; };
...@@ -27,4 +27,34 @@ mcu_i2c0: i2c@40b00000 { ...@@ -27,4 +27,34 @@ mcu_i2c0: i2c@40b00000 {
clocks = <&k3_clks 114 1>; clocks = <&k3_clks 114 1>;
power-domains = <&k3_pds 114>; power-domains = <&k3_pds 114>;
}; };
mcu_spi0: spi@40300000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x40300000 0x0 0x400>;
interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 142 1>;
power-domains = <&k3_pds 142>;
#address-cells = <1>;
#size-cells = <0>;
};
mcu_spi1: spi@40310000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x40310000 0x0 0x400>;
interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 143 1>;
power-domains = <&k3_pds 143>;
#address-cells = <1>;
#size-cells = <0>;
};
mcu_spi2: spi@40320000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x0 0x40320000 0x0 0x400>;
interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 144 1>;
power-domains = <&k3_pds 144>;
#address-cells = <1>;
#size-cells = <0>;
};
}; };
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