Commit 31031771 authored by James Willcox's avatar James Willcox Committed by Rob Clark

drm/msm/mdp5: add perf blocks for holding fudge factors

Prior downstream kernels had "fudge factors" in devicetree which would
be applied to things like interconnect bandwidth calculations. Bring
some of those values back here.
Signed-off-by: default avatarJames Willcox <jwillcox@squareup.com>
[DB: changed _ff to _inefficiency, fixed patch description]
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210525131316.3117809-7-dmitry.baryshkov@linaro.orgSigned-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 7d36db0b
...@@ -95,6 +95,11 @@ static const struct mdp5_cfg_hw msm8x74v1_config = { ...@@ -95,6 +95,11 @@ static const struct mdp5_cfg_hw msm8x74v1_config = {
[3] = INTF_HDMI, [3] = INTF_HDMI,
}, },
}, },
.perf = {
.ab_inefficiency = 200,
.ib_inefficiency = 120,
.clk_inefficiency = 125
},
.max_clk = 200000000, .max_clk = 200000000,
}; };
...@@ -177,6 +182,11 @@ static const struct mdp5_cfg_hw msm8x74v2_config = { ...@@ -177,6 +182,11 @@ static const struct mdp5_cfg_hw msm8x74v2_config = {
[3] = INTF_HDMI, [3] = INTF_HDMI,
}, },
}, },
.perf = {
.ab_inefficiency = 200,
.ib_inefficiency = 120,
.clk_inefficiency = 125
},
.max_clk = 320000000, .max_clk = 320000000,
}; };
...@@ -272,6 +282,11 @@ static const struct mdp5_cfg_hw apq8084_config = { ...@@ -272,6 +282,11 @@ static const struct mdp5_cfg_hw apq8084_config = {
[3] = INTF_HDMI, [3] = INTF_HDMI,
}, },
}, },
.perf = {
.ab_inefficiency = 200,
.ib_inefficiency = 120,
.clk_inefficiency = 105
},
.max_clk = 320000000, .max_clk = 320000000,
}; };
...@@ -339,6 +354,11 @@ static const struct mdp5_cfg_hw msm8x16_config = { ...@@ -339,6 +354,11 @@ static const struct mdp5_cfg_hw msm8x16_config = {
[1] = INTF_DSI, [1] = INTF_DSI,
}, },
}, },
.perf = {
.ab_inefficiency = 100,
.ib_inefficiency = 200,
.clk_inefficiency = 105
},
.max_clk = 320000000, .max_clk = 320000000,
}; };
...@@ -414,6 +434,11 @@ static const struct mdp5_cfg_hw msm8x36_config = { ...@@ -414,6 +434,11 @@ static const struct mdp5_cfg_hw msm8x36_config = {
[2] = INTF_DSI, [2] = INTF_DSI,
}, },
}, },
.perf = {
.ab_inefficiency = 100,
.ib_inefficiency = 200,
.clk_inefficiency = 105
},
.max_clk = 366670000, .max_clk = 366670000,
}; };
...@@ -509,6 +534,11 @@ static const struct mdp5_cfg_hw msm8x94_config = { ...@@ -509,6 +534,11 @@ static const struct mdp5_cfg_hw msm8x94_config = {
[3] = INTF_HDMI, [3] = INTF_HDMI,
}, },
}, },
.perf = {
.ab_inefficiency = 100,
.ib_inefficiency = 100,
.clk_inefficiency = 105
},
.max_clk = 400000000, .max_clk = 400000000,
}; };
...@@ -617,6 +647,11 @@ static const struct mdp5_cfg_hw msm8x96_config = { ...@@ -617,6 +647,11 @@ static const struct mdp5_cfg_hw msm8x96_config = {
[3] = INTF_HDMI, [3] = INTF_HDMI,
}, },
}, },
.perf = {
.ab_inefficiency = 100,
.ib_inefficiency = 200,
.clk_inefficiency = 105
},
.max_clk = 412500000, .max_clk = 412500000,
}; };
......
...@@ -76,6 +76,12 @@ struct mdp5_intf_block { ...@@ -76,6 +76,12 @@ struct mdp5_intf_block {
u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */ u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
}; };
struct mdp5_perf_block {
u32 ab_inefficiency;
u32 ib_inefficiency;
u32 clk_inefficiency;
};
struct mdp5_cfg_hw { struct mdp5_cfg_hw {
char *name; char *name;
...@@ -93,6 +99,7 @@ struct mdp5_cfg_hw { ...@@ -93,6 +99,7 @@ struct mdp5_cfg_hw {
struct mdp5_sub_block dsc; struct mdp5_sub_block dsc;
struct mdp5_sub_block cdm; struct mdp5_sub_block cdm;
struct mdp5_intf_block intf; struct mdp5_intf_block intf;
struct mdp5_perf_block perf;
uint32_t max_clk; uint32_t max_clk;
}; };
......
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