Commit 329ee708 authored by Chris Park's avatar Chris Park Committed by Alex Deucher

drm/amd/display: Address coverity change

[Why]
Coverity picks up a defect with regards to array underflow.

[How]
Address coverity issue as recommended.
Reviewed-by: default avatarLeo Ma <hanghong.ma@amd.com>
Signed-off-by: default avatarChris Park <chris.park@amd.com>
Signed-off-by: default avatarWayne Lin <wayne.lin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8151a6c1
...@@ -517,10 +517,12 @@ static void dcn401_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr ...@@ -517,10 +517,12 @@ static void dcn401_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr
if (!use_hpo_encoder) if (!use_hpo_encoder)
continue; continue;
otg_master->clock_source->funcs->program_pix_clk( if (otg_master->stream_res.pix_clk_params.controller_id > CONTROLLER_ID_UNDEFINED)
otg_master->clock_source->funcs->program_pix_clk(
otg_master->clock_source, otg_master->clock_source,
&otg_master->stream_res.pix_clk_params, &otg_master->stream_res.pix_clk_params,
dccg->ctx->dc->link_srv->dp_get_encoding_format(&otg_master->link_config.dp_link_settings), dccg->ctx->dc->link_srv->dp_get_encoding_format(
&otg_master->link_config.dp_link_settings),
&otg_master->pll_settings); &otg_master->pll_settings);
} }
} }
......
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