Commit 360a7943 authored by Sergey Shtylyov's avatar Sergey Shtylyov Committed by Jakub Kicinski

ravb: update "undocumented" annotations

The "undocumented" annotations in the EtherAVB driver were done against
the R-Car gen2 manuals; most of these registers/bits were then described
in the R-Car gen3 manuals -- reflect  this fact in the annotations (note
that ECSIPR.LCHNGIP was documented in the recent R-Car gen2 manual)...
Signed-off-by: default avatarSergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent f4d680e5
...@@ -165,7 +165,7 @@ enum ravb_reg { ...@@ -165,7 +165,7 @@ enum ravb_reg {
GTO2 = 0x03A8, GTO2 = 0x03A8,
GIC = 0x03AC, GIC = 0x03AC,
GIS = 0x03B0, GIS = 0x03B0,
GCPT = 0x03B4, /* Undocumented? */ GCPT = 0x03B4, /* Documented for R-Car Gen3 only */
GCT0 = 0x03B8, GCT0 = 0x03B8,
GCT1 = 0x03BC, GCT1 = 0x03BC,
GCT2 = 0x03C0, GCT2 = 0x03C0,
...@@ -225,7 +225,7 @@ enum CSR_BIT { ...@@ -225,7 +225,7 @@ enum CSR_BIT {
CSR_OPS_RESET = 0x00000001, CSR_OPS_RESET = 0x00000001,
CSR_OPS_CONFIG = 0x00000002, CSR_OPS_CONFIG = 0x00000002,
CSR_OPS_OPERATION = 0x00000004, CSR_OPS_OPERATION = 0x00000004,
CSR_OPS_STANDBY = 0x00000008, /* Undocumented? */ CSR_OPS_STANDBY = 0x00000008, /* Documented for R-Car Gen3 only */
CSR_DTS = 0x00000100, CSR_DTS = 0x00000100,
CSR_TPO0 = 0x00010000, CSR_TPO0 = 0x00010000,
CSR_TPO1 = 0x00020000, CSR_TPO1 = 0x00020000,
...@@ -529,16 +529,16 @@ enum RIS2_BIT { ...@@ -529,16 +529,16 @@ enum RIS2_BIT {
/* TIC */ /* TIC */
enum TIC_BIT { enum TIC_BIT {
TIC_FTE0 = 0x00000001, /* Undocumented? */ TIC_FTE0 = 0x00000001, /* Documented for R-Car Gen3 only */
TIC_FTE1 = 0x00000002, /* Undocumented? */ TIC_FTE1 = 0x00000002, /* Documented for R-Car Gen3 only */
TIC_TFUE = 0x00000100, TIC_TFUE = 0x00000100,
TIC_TFWE = 0x00000200, TIC_TFWE = 0x00000200,
}; };
/* TIS */ /* TIS */
enum TIS_BIT { enum TIS_BIT {
TIS_FTF0 = 0x00000001, /* Undocumented? */ TIS_FTF0 = 0x00000001, /* Documented for R-Car Gen3 only */
TIS_FTF1 = 0x00000002, /* Undocumented? */ TIS_FTF1 = 0x00000002, /* Documented for R-Car Gen3 only */
TIS_TFUF = 0x00000100, TIS_TFUF = 0x00000100,
TIS_TFWF = 0x00000200, TIS_TFWF = 0x00000200,
TIS_RESERVED = (GENMASK(31, 20) | GENMASK(15, 12) | GENMASK(7, 4)) TIS_RESERVED = (GENMASK(31, 20) | GENMASK(15, 12) | GENMASK(7, 4))
...@@ -546,8 +546,8 @@ enum TIS_BIT { ...@@ -546,8 +546,8 @@ enum TIS_BIT {
/* ISS */ /* ISS */
enum ISS_BIT { enum ISS_BIT {
ISS_FRS = 0x00000001, /* Undocumented? */ ISS_FRS = 0x00000001, /* Documented for R-Car Gen3 only */
ISS_FTS = 0x00000004, /* Undocumented? */ ISS_FTS = 0x00000004, /* Documented for R-Car Gen3 only */
ISS_ES = 0x00000040, ISS_ES = 0x00000040,
ISS_MS = 0x00000080, ISS_MS = 0x00000080,
ISS_TFUS = 0x00000100, ISS_TFUS = 0x00000100,
...@@ -607,13 +607,13 @@ enum GTI_BIT { ...@@ -607,13 +607,13 @@ enum GTI_BIT {
/* GIC */ /* GIC */
enum GIC_BIT { enum GIC_BIT {
GIC_PTCE = 0x00000001, /* Undocumented? */ GIC_PTCE = 0x00000001, /* Documented for R-Car Gen3 only */
GIC_PTME = 0x00000004, GIC_PTME = 0x00000004,
}; };
/* GIS */ /* GIS */
enum GIS_BIT { enum GIS_BIT {
GIS_PTCF = 0x00000001, /* Undocumented? */ GIS_PTCF = 0x00000001, /* Documented for R-Car Gen3 only */
GIS_PTMF = 0x00000004, GIS_PTMF = 0x00000004,
GIS_RESERVED = GENMASK(15, 10), GIS_RESERVED = GENMASK(15, 10),
}; };
...@@ -807,10 +807,10 @@ enum ECMR_BIT { ...@@ -807,10 +807,10 @@ enum ECMR_BIT {
ECMR_TE = 0x00000020, ECMR_TE = 0x00000020,
ECMR_RE = 0x00000040, ECMR_RE = 0x00000040,
ECMR_MPDE = 0x00000200, ECMR_MPDE = 0x00000200,
ECMR_TXF = 0x00010000, /* Undocumented? */ ECMR_TXF = 0x00010000, /* Documented for R-Car Gen3 only */
ECMR_RXF = 0x00020000, ECMR_RXF = 0x00020000,
ECMR_PFR = 0x00040000, ECMR_PFR = 0x00040000,
ECMR_ZPF = 0x00080000, /* Undocumented? */ ECMR_ZPF = 0x00080000, /* Documented for R-Car Gen3 only */
ECMR_RZPF = 0x00100000, ECMR_RZPF = 0x00100000,
ECMR_DPAD = 0x00200000, ECMR_DPAD = 0x00200000,
ECMR_RCSC = 0x00800000, ECMR_RCSC = 0x00800000,
...@@ -829,7 +829,7 @@ enum ECSR_BIT { ...@@ -829,7 +829,7 @@ enum ECSR_BIT {
enum ECSIPR_BIT { enum ECSIPR_BIT {
ECSIPR_ICDIP = 0x00000001, ECSIPR_ICDIP = 0x00000001,
ECSIPR_MPDIP = 0x00000002, ECSIPR_MPDIP = 0x00000002,
ECSIPR_LCHNGIP = 0x00000004, /* Undocumented? */ ECSIPR_LCHNGIP = 0x00000004,
}; };
/* PIR */ /* PIR */
......
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