Commit 3d71644c authored by Andrew Vasquez's avatar Andrew Vasquez Committed by James Bottomley

[SCSI] qla2xxx: Add ISP24xx definitions.

Add ISP24xx definitions.

Add requisite structure definitions and #define's for ISP24xx
support.  Also drop volatile modifiers from device_reg_* register
layouts as the members are never really accessed, only their
offsets within the layout are used during reads and writes.
Signed-off-by: default avatarAndrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent ac96202b
......@@ -36,7 +36,7 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
uint16_t mb0, mb2;
uint32_t stat;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint16_t __iomem *dmp_reg;
unsigned long flags;
struct qla2300_fw_dump *fw;
......@@ -587,7 +587,7 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
uint32_t cnt, timer;
uint16_t risc_address;
uint16_t mb0, mb2;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint16_t __iomem *dmp_reg;
unsigned long flags;
struct qla2100_fw_dump *fw;
......@@ -984,7 +984,7 @@ qla_uprintf(char **uiter, char *fmt, ...)
void
qla2x00_dump_regs(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
printk("Mailbox registers:\n");
printk("scsi(%ld): mbox 0 0x%04x \n",
......
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......@@ -195,6 +195,7 @@ qla2100_pci_config(scsi_qla_host_t *ha)
{
uint16_t w, mwi;
unsigned long flags;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
......@@ -215,7 +216,7 @@ qla2100_pci_config(scsi_qla_host_t *ha)
/* Get PCI bus information. */
spin_lock_irqsave(&ha->hardware_lock, flags);
ha->pci_attr = RD_REG_WORD(&ha->iobase->ctrl_status);
ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
return QLA_SUCCESS;
......@@ -233,6 +234,7 @@ qla2300_pci_config(scsi_qla_host_t *ha)
uint16_t w, mwi;
unsigned long flags = 0;
uint32_t cnt;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
......@@ -259,34 +261,32 @@ qla2300_pci_config(scsi_qla_host_t *ha)
spin_lock_irqsave(&ha->hardware_lock, flags);
/* Pause RISC. */
WRT_REG_WORD(&ha->iobase->hccr, HCCR_PAUSE_RISC);
WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
for (cnt = 0; cnt < 30000; cnt++) {
if ((RD_REG_WORD(&ha->iobase->hccr) &
HCCR_RISC_PAUSE) != 0)
if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
break;
udelay(10);
}
/* Select FPM registers. */
WRT_REG_WORD(&ha->iobase->ctrl_status, 0x20);
RD_REG_WORD(&ha->iobase->ctrl_status);
WRT_REG_WORD(&reg->ctrl_status, 0x20);
RD_REG_WORD(&reg->ctrl_status);
/* Get the fb rev level */
ha->fb_rev = RD_FB_CMD_REG(ha, ha->iobase);
ha->fb_rev = RD_FB_CMD_REG(ha, reg);
if (ha->fb_rev == FPM_2300)
w &= ~PCI_COMMAND_INVALIDATE;
/* Deselect FPM registers. */
WRT_REG_WORD(&ha->iobase->ctrl_status, 0x0);
RD_REG_WORD(&ha->iobase->ctrl_status);
WRT_REG_WORD(&reg->ctrl_status, 0x0);
RD_REG_WORD(&reg->ctrl_status);
/* Release RISC module. */
WRT_REG_WORD(&ha->iobase->hccr, HCCR_RELEASE_RISC);
WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
for (cnt = 0; cnt < 30000; cnt++) {
if ((RD_REG_WORD(&ha->iobase->hccr) &
HCCR_RISC_PAUSE) == 0)
if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
break;
udelay(10);
......@@ -305,7 +305,7 @@ qla2300_pci_config(scsi_qla_host_t *ha)
/* Get PCI bus information. */
spin_lock_irqsave(&ha->hardware_lock, flags);
ha->pci_attr = RD_REG_WORD(&ha->iobase->ctrl_status);
ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
return QLA_SUCCESS;
......@@ -352,7 +352,7 @@ void
qla2x00_reset_chip(scsi_qla_host_t *ha)
{
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint32_t cnt;
unsigned long mbx_flags = 0;
uint16_t cmd;
......@@ -505,7 +505,7 @@ int
qla2x00_chip_diag(scsi_qla_host_t *ha)
{
int rval;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
unsigned long flags = 0;
uint16_t data;
uint32_t cnt;
......@@ -889,7 +889,7 @@ qla2x00_update_fw_options(scsi_qla_host_t *ha)
void
qla2x00_config_rings(struct scsi_qla_host *ha)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
/* Setup ring parameters in initialization control block. */
ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
......@@ -1196,7 +1196,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha)
init_cb_t *icb = ha->init_cb;
nvram_t *nv = (nvram_t *)ha->request_ring;
uint16_t *wptr = (uint16_t *)ha->request_ring;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint8_t timer_mode;
rval = QLA_SUCCESS;
......@@ -1389,8 +1389,6 @@ qla2x00_nvram_config(scsi_qla_host_t *ha)
/*
* Set host adapter parameters.
*/
ha->nvram_version = nv->nvram_version;
ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
/* Always load RISC code on non ISP2[12]00 chips. */
if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
......@@ -1410,7 +1408,8 @@ qla2x00_nvram_config(scsi_qla_host_t *ha)
ha->serial0 = icb->port_name[5];
ha->serial1 = icb->port_name[6];
ha->serial2 = icb->port_name[7];
memcpy(ha->node_name, icb->node_name, WWN_SIZE);
ha->node_name = icb->node_name;
ha->port_name = icb->port_name;
icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
......@@ -2158,7 +2157,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
loop_id = ha->min_external_loopid;
for (; loop_id <= ha->last_loop_id; loop_id++) {
if (RESERVED_LOOP_ID(loop_id))
if (qla2x00_is_reserved_id(ha, loop_id))
continue;
if (atomic_read(&ha->loop_down_timer) ||
......@@ -2328,7 +2327,7 @@ qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
}
/* Skip reserved loop IDs. */
while (RESERVED_LOOP_ID(dev->loop_id)) {
while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
dev->loop_id++;
}
......@@ -2888,7 +2887,7 @@ static int
qla2x00_restart_isp(scsi_qla_host_t *ha)
{
uint8_t status = 0;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
unsigned long flags = 0;
uint32_t wait_time;
......@@ -2901,8 +2900,6 @@ qla2x00_restart_isp(scsi_qla_host_t *ha)
goto done;
}
reg = ha->iobase;
spin_lock_irqsave(&ha->hardware_lock, flags);
/* Disable SRAM, Instruction RAM and GP RAM parity. */
......@@ -2973,7 +2970,7 @@ void
qla2x00_reset_adapter(scsi_qla_host_t *ha)
{
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
ha->flags.online = 0;
ha->isp_ops.disable_intrs(ha);
......
......@@ -236,3 +236,14 @@ qla2x00_delete_timer_from_cmd(srb_t *sp)
}
}
static inline int qla2x00_is_reserved_id(scsi_qla_host_t *, uint16_t);
static inline int
qla2x00_is_reserved_id(scsi_qla_host_t *ha, uint16_t loop_id)
{
if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
return (loop_id > NPH_LAST_HANDLE);
return ((loop_id > ha->last_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST);
};
......@@ -315,13 +315,13 @@ qla2x00_start_scsi(srb_t *sp)
uint16_t cnt;
uint16_t req_cnt;
uint16_t tot_dsds;
device_reg_t __iomem *reg;
struct device_reg_2xxx __iomem *reg;
char tag[2];
/* Setup device pointers. */
ret = 0;
ha = sp->ha;
reg = ha->iobase;
reg = &ha->iobase->isp;
cmd = sp->cmd;
/* So we know we haven't pci_map'ed anything yet */
tot_dsds = 0;
......@@ -521,7 +521,7 @@ qla2x00_marker(scsi_qla_host_t *ha, uint16_t loop_id, uint16_t lun,
static request_t *
qla2x00_req_pkt(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
request_t *pkt = NULL;
uint16_t cnt;
uint32_t *dword_ptr;
......@@ -586,7 +586,7 @@ qla2x00_req_pkt(scsi_qla_host_t *ha)
void
qla2x00_isp_cmd(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
DEBUG5(printk("%s(): IOCB data:\n", __func__));
DEBUG5(qla2x00_dump_buffer(
......
......@@ -41,7 +41,7 @@ irqreturn_t
qla2100_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
{
scsi_qla_host_t *ha;
device_reg_t __iomem *reg;
struct device_reg_2xxx __iomem *reg;
int status;
unsigned long flags;
unsigned long iter;
......@@ -54,7 +54,7 @@ qla2100_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
return (IRQ_NONE);
}
reg = ha->iobase;
reg = &ha->iobase->isp;
status = 0;
spin_lock_irqsave(&ha->hardware_lock, flags);
......@@ -118,7 +118,7 @@ irqreturn_t
qla2300_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
{
scsi_qla_host_t *ha;
device_reg_t __iomem *reg;
struct device_reg_2xxx __iomem *reg;
int status;
unsigned long flags;
unsigned long iter;
......@@ -133,7 +133,7 @@ qla2300_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
return (IRQ_NONE);
}
reg = ha->iobase;
reg = &ha->iobase->isp;
status = 0;
spin_lock_irqsave(&ha->hardware_lock, flags);
......@@ -220,7 +220,7 @@ qla2x00_mbx_completion(scsi_qla_host_t *ha, uint16_t mb0)
{
uint16_t cnt;
uint16_t __iomem *wptr;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
/* Load return mailbox registers. */
ha->flags.mbox_int = 1;
......@@ -261,7 +261,7 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint32_t mbx)
uint16_t handle_cnt;
uint16_t cnt;
uint32_t handles[5];
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint32_t rscn_entry, host_pid;
uint8_t rscn_queue_index;
......@@ -707,7 +707,7 @@ qla2x00_process_completed_request(struct scsi_qla_host *ha, uint32_t index)
void
qla2x00_process_response_queue(struct scsi_qla_host *ha)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
sts_entry_t *pkt;
uint16_t handle_cnt;
uint16_t cnt;
......
......@@ -58,7 +58,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
{
int rval;
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
struct timer_list tmp_intr_timer;
uint8_t abort_active = test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags);
uint8_t io_lock_on = ha->flags.init_done;
......
......@@ -1089,7 +1089,7 @@ static void
qla2x00_enable_intrs(scsi_qla_host_t *ha)
{
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
spin_lock_irqsave(&ha->hardware_lock, flags);
ha->interrupts_on = 1;
......@@ -1104,7 +1104,7 @@ static void
qla2x00_disable_intrs(scsi_qla_host_t *ha)
{
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
spin_lock_irqsave(&ha->hardware_lock, flags);
ha->interrupts_on = 0;
......@@ -1120,7 +1120,7 @@ qla2x00_disable_intrs(scsi_qla_host_t *ha)
int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
{
int ret = -ENODEV;
device_reg_t __iomem *reg;
struct device_reg_2xxx __iomem *reg;
struct Scsi_Host *host;
scsi_qla_host_t *ha;
unsigned long flags = 0;
......@@ -1300,7 +1300,7 @@ int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
ha->host_no, ha));
reg = ha->iobase;
reg = &ha->iobase->isp;
ha->isp_ops.disable_intrs(ha);
......
......@@ -348,7 +348,7 @@ static inline struct mbx_entry *
qla2x00_get_mbx_iocb_entry(scsi_qla_host_t *ha, uint32_t handle)
{
uint16_t cnt;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
struct mbx_entry *mbxentry;
mbxentry = NULL;
......
......@@ -38,7 +38,7 @@ void
qla2x00_lock_nvram_access(scsi_qla_host_t *ha)
{
uint16_t data;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) {
data = RD_REG_WORD(&reg->nvram);
......@@ -70,7 +70,7 @@ qla2x00_lock_nvram_access(scsi_qla_host_t *ha)
void
qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) {
WRT_REG_WORD(&reg->u.isp2300.host_semaphore, 0);
......@@ -85,11 +85,9 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
void
qla2x00_release_nvram_protection(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint32_t word;
reg = ha->iobase;
/* Release NVRAM write protection. */
if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
/* Write enable. */
......@@ -161,7 +159,7 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
int count;
uint16_t word;
uint32_t nv_cmd;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
qla2x00_nv_write(ha, NVR_DATA_OUT);
qla2x00_nv_write(ha, 0);
......@@ -223,7 +221,7 @@ static uint16_t
qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd)
{
uint8_t cnt;
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint16_t data = 0;
uint16_t reg_data;
......@@ -265,7 +263,7 @@ qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd)
static void
qla2x00_nv_deselect(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
WRT_REG_WORD(&reg->nvram, NVR_DESELECT);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */
......@@ -280,7 +278,7 @@ qla2x00_nv_deselect(scsi_qla_host_t *ha)
static void
qla2x00_nv_write(scsi_qla_host_t *ha, uint16_t data)
{
device_reg_t __iomem *reg = ha->iobase;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */
......
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