Commit 4af452bd authored by Jeff Garzik's avatar Jeff Garzik

Merge branch 'master'

parents 625876f3 3bedff1d
Kernel Memory Layout on ARM Linux Kernel Memory Layout on ARM Linux
Russell King <rmk@arm.linux.org.uk> Russell King <rmk@arm.linux.org.uk>
May 21, 2004 (2.6.6) November 17, 2005 (2.6.15)
This document describes the virtual memory layout which the Linux This document describes the virtual memory layout which the Linux
kernel uses for ARM processors. It indicates which regions are kernel uses for ARM processors. It indicates which regions are
...@@ -37,6 +37,8 @@ ff000000 ffbfffff Reserved for future expansion of DMA ...@@ -37,6 +37,8 @@ ff000000 ffbfffff Reserved for future expansion of DMA
mapping region. mapping region.
VMALLOC_END feffffff Free for platform use, recommended. VMALLOC_END feffffff Free for platform use, recommended.
VMALLOC_END must be aligned to a 2MB
boundary.
VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
Memory returned by vmalloc/ioremap will Memory returned by vmalloc/ioremap will
......
VERSION = 2 VERSION = 2
PATCHLEVEL = 6 PATCHLEVEL = 6
SUBLEVEL = 15 SUBLEVEL = 15
EXTRAVERSION =-rc1 EXTRAVERSION =-rc2
NAME=Affluent Albatross NAME=Affluent Albatross
# *DOCUMENTATION* # *DOCUMENTATION*
......
...@@ -120,7 +120,6 @@ EXPORT_SYMBOL(__arch_strncpy_from_user); ...@@ -120,7 +120,6 @@ EXPORT_SYMBOL(__arch_strncpy_from_user);
EXPORT_SYMBOL(__get_user_1); EXPORT_SYMBOL(__get_user_1);
EXPORT_SYMBOL(__get_user_2); EXPORT_SYMBOL(__get_user_2);
EXPORT_SYMBOL(__get_user_4); EXPORT_SYMBOL(__get_user_4);
EXPORT_SYMBOL(__get_user_8);
EXPORT_SYMBOL(__put_user_1); EXPORT_SYMBOL(__put_user_1);
EXPORT_SYMBOL(__put_user_2); EXPORT_SYMBOL(__put_user_2);
......
...@@ -48,8 +48,7 @@ work_pending: ...@@ -48,8 +48,7 @@ work_pending:
mov r0, sp @ 'regs' mov r0, sp @ 'regs'
mov r2, why @ 'syscall' mov r2, why @ 'syscall'
bl do_notify_resume bl do_notify_resume
disable_irq @ disable interrupts b ret_slow_syscall @ Check work again
b no_work_pending
work_resched: work_resched:
bl schedule bl schedule
......
...@@ -595,23 +595,22 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, ...@@ -595,23 +595,22 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
*/ */
ret |= !valid_user_regs(regs); ret |= !valid_user_regs(regs);
/*
* Block the signal if we were unsuccessful.
*/
if (ret != 0) { if (ret != 0) {
spin_lock_irq(&tsk->sighand->siglock); force_sigsegv(sig, tsk);
sigorsets(&tsk->blocked, &tsk->blocked, return;
&ka->sa.sa_mask);
if (!(ka->sa.sa_flags & SA_NODEFER))
sigaddset(&tsk->blocked, sig);
recalc_sigpending();
spin_unlock_irq(&tsk->sighand->siglock);
} }
if (ret == 0) /*
return; * Block the signal if we were successful.
*/
spin_lock_irq(&tsk->sighand->siglock);
sigorsets(&tsk->blocked, &tsk->blocked,
&ka->sa.sa_mask);
if (!(ka->sa.sa_flags & SA_NODEFER))
sigaddset(&tsk->blocked, sig);
recalc_sigpending();
spin_unlock_irq(&tsk->sighand->siglock);
force_sigsegv(sig, tsk);
} }
/* /*
......
...@@ -172,6 +172,10 @@ SECTIONS ...@@ -172,6 +172,10 @@ SECTIONS
.comment 0 : { *(.comment) } .comment 0 : { *(.comment) }
} }
/* those must never be empty */ /*
* These must never be empty
* If you have to comment these two assert statements out, your
* binutils is too old (for other reasons as well)
*/
ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support") ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined") ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
...@@ -54,15 +54,6 @@ __get_user_4: ...@@ -54,15 +54,6 @@ __get_user_4:
mov r0, #0 mov r0, #0
mov pc, lr mov pc, lr
.global __get_user_8
__get_user_8:
5: ldrt r2, [r0], #4
6: ldrt r3, [r0]
mov r0, #0
mov pc, lr
__get_user_bad_8:
mov r3, #0
__get_user_bad: __get_user_bad:
mov r2, #0 mov r2, #0
mov r0, #-EFAULT mov r0, #-EFAULT
...@@ -73,6 +64,4 @@ __get_user_bad: ...@@ -73,6 +64,4 @@ __get_user_bad:
.long 2b, __get_user_bad .long 2b, __get_user_bad
.long 3b, __get_user_bad .long 3b, __get_user_bad
.long 4b, __get_user_bad .long 4b, __get_user_bad
.long 5b, __get_user_bad_8
.long 6b, __get_user_bad_8
.previous .previous
...@@ -51,4 +51,4 @@ obj-$(CONFIG_CPU_ARM1026) += proc-arm1026.o ...@@ -51,4 +51,4 @@ obj-$(CONFIG_CPU_ARM1026) += proc-arm1026.o
obj-$(CONFIG_CPU_SA110) += proc-sa110.o obj-$(CONFIG_CPU_SA110) += proc-sa110.o
obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o
obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o
obj-$(CONFIG_CPU_V6) += proc-v6.o blockops.o obj-$(CONFIG_CPU_V6) += proc-v6.o
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/mm.h>
#include <asm/memory.h>
#include <asm/ptrace.h>
#include <asm/cacheflush.h>
#include <asm/traps.h>
extern struct cpu_cache_fns blk_cache_fns;
#define HARVARD_CACHE
/*
* blk_flush_kern_dcache_page(kaddr)
*
* Ensure that the data held in the page kaddr is written back
* to the page in question.
*
* - kaddr - kernel address (guaranteed to be page aligned)
*/
static void __attribute__((naked))
blk_flush_kern_dcache_page(void *kaddr)
{
asm(
"add r1, r0, %0 \n\
sub r1, r1, %1 \n\
1: .word 0xec401f0e @ mcrr p15, 0, r0, r1, c14, 0 @ blocking \n\
mov r0, #0 \n\
mcr p15, 0, r0, c7, c5, 0 \n\
mcr p15, 0, r0, c7, c10, 4 \n\
mov pc, lr"
:
: "I" (PAGE_SIZE), "I" (L1_CACHE_BYTES));
}
/*
* blk_dma_inv_range(start,end)
*
* Invalidate the data cache within the specified region; we will
* be performing a DMA operation in this region and we want to
* purge old data in the cache.
*
* - start - virtual start address of region
* - end - virtual end address of region
*/
static void __attribute__((naked))
blk_dma_inv_range_unified(unsigned long start, unsigned long end)
{
asm(
"tst r0, %0 \n\
mcrne p15, 0, r0, c7, c11, 1 @ clean unified line \n\
tst r1, %0 \n\
mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line\n\
.word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
mov r0, #0 \n\
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
mov pc, lr"
:
: "I" (L1_CACHE_BYTES - 1));
}
static void __attribute__((naked))
blk_dma_inv_range_harvard(unsigned long start, unsigned long end)
{
asm(
"tst r0, %0 \n\
mcrne p15, 0, r0, c7, c10, 1 @ clean D line \n\
tst r1, %0 \n\
mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line \n\
.word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
mov r0, #0 \n\
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
mov pc, lr"
:
: "I" (L1_CACHE_BYTES - 1));
}
/*
* blk_dma_clean_range(start,end)
* - start - virtual start address of region
* - end - virtual end address of region
*/
static void __attribute__((naked))
blk_dma_clean_range(unsigned long start, unsigned long end)
{
asm(
".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0 @ blocking \n\
mov r0, #0 \n\
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
mov pc, lr");
}
/*
* blk_dma_flush_range(start,end)
* - start - virtual start address of region
* - end - virtual end address of region
*/
static void __attribute__((naked))
blk_dma_flush_range(unsigned long start, unsigned long end)
{
asm(
".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0 @ blocking \n\
mov pc, lr");
}
static int blockops_trap(struct pt_regs *regs, unsigned int instr)
{
regs->ARM_r4 |= regs->ARM_r2;
regs->ARM_pc += 4;
return 0;
}
static char *func[] = {
"Prefetch data range",
"Clean+Invalidate data range",
"Clean data range",
"Invalidate data range",
"Invalidate instr range"
};
static struct undef_hook blockops_hook __initdata = {
.instr_mask = 0x0fffffd0,
.instr_val = 0x0c401f00,
.cpsr_mask = PSR_T_BIT,
.cpsr_val = 0,
.fn = blockops_trap,
};
static int __init blockops_check(void)
{
register unsigned int err asm("r4") = 0;
unsigned int err_pos = 1;
unsigned int cache_type;
int i;
asm("mrc p15, 0, %0, c0, c0, 1" : "=r" (cache_type));
printk("Checking V6 block cache operations:\n");
register_undef_hook(&blockops_hook);
__asm__ ("mov r0, %0\n\t"
"mov r1, %1\n\t"
"mov r2, #1\n\t"
".word 0xec401f2c @ mcrr p15, 0, r1, r0, c12, 2\n\t"
"mov r2, #2\n\t"
".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0\n\t"
"mov r2, #4\n\t"
".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0\n\t"
"mov r2, #8\n\t"
".word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0\n\t"
"mov r2, #16\n\t"
".word 0xec401f05 @ mcrr p15, 0, r1, r0, c5, 0\n\t"
:
: "r" (PAGE_OFFSET), "r" (PAGE_OFFSET + 128)
: "r0", "r1", "r2");
unregister_undef_hook(&blockops_hook);
for (i = 0; i < ARRAY_SIZE(func); i++, err_pos <<= 1)
printk("%30s: %ssupported\n", func[i], err & err_pos ? "not " : "");
if ((err & 8) == 0) {
printk(" --> Using %s block cache invalidate\n",
cache_type & (1 << 24) ? "harvard" : "unified");
if (cache_type & (1 << 24))
cpu_cache.dma_inv_range = blk_dma_inv_range_harvard;
else
cpu_cache.dma_inv_range = blk_dma_inv_range_unified;
}
if ((err & 4) == 0) {
printk(" --> Using block cache clean\n");
cpu_cache.dma_clean_range = blk_dma_clean_range;
}
if ((err & 2) == 0) {
printk(" --> Using block cache clean+invalidate\n");
cpu_cache.dma_flush_range = blk_dma_flush_range;
cpu_cache.flush_kern_dcache_page = blk_flush_kern_dcache_page;
}
return 0;
}
__initcall(blockops_check);
...@@ -420,7 +420,8 @@ static void __init bootmem_init(struct meminfo *mi) ...@@ -420,7 +420,8 @@ static void __init bootmem_init(struct meminfo *mi)
* Set up device the mappings. Since we clear out the page tables for all * Set up device the mappings. Since we clear out the page tables for all
* mappings above VMALLOC_END, we will remove any debug device mappings. * mappings above VMALLOC_END, we will remove any debug device mappings.
* This means you have to be careful how you debug this function, or any * This means you have to be careful how you debug this function, or any
* called function. (Do it by code inspection!) * called function. This means you can't use any function or debugging
* method which may touch any device, otherwise the kernel _will_ crash.
*/ */
static void __init devicemaps_init(struct machine_desc *mdesc) static void __init devicemaps_init(struct machine_desc *mdesc)
{ {
...@@ -428,6 +429,12 @@ static void __init devicemaps_init(struct machine_desc *mdesc) ...@@ -428,6 +429,12 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
unsigned long addr; unsigned long addr;
void *vectors; void *vectors;
/*
* Allocate the vector page early.
*/
vectors = alloc_bootmem_low_pages(PAGE_SIZE);
BUG_ON(!vectors);
for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
pmd_clear(pmd_off_k(addr)); pmd_clear(pmd_off_k(addr));
...@@ -461,12 +468,6 @@ static void __init devicemaps_init(struct machine_desc *mdesc) ...@@ -461,12 +468,6 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
create_mapping(&map); create_mapping(&map);
#endif #endif
flush_cache_all();
local_flush_tlb_all();
vectors = alloc_bootmem_low_pages(PAGE_SIZE);
BUG_ON(!vectors);
/* /*
* Create a mapping for the machine vectors at the high-vectors * Create a mapping for the machine vectors at the high-vectors
* location (0xffff0000). If we aren't using high-vectors, also * location (0xffff0000). If we aren't using high-vectors, also
...@@ -491,12 +492,13 @@ static void __init devicemaps_init(struct machine_desc *mdesc) ...@@ -491,12 +492,13 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
mdesc->map_io(); mdesc->map_io();
/* /*
* Finally flush the tlb again - this ensures that we're in a * Finally flush the caches and tlb to ensure that we're in a
* consistent state wrt the writebuffer if the writebuffer needs * consistent state wrt the writebuffer. This also ensures that
* draining. After this point, we can start to touch devices * any write-allocated cache lines in the vector page are written
* again. * back. After this point, we can start to touch devices again.
*/ */
local_flush_tlb_all(); local_flush_tlb_all();
flush_cache_all();
} }
/* /*
......
...@@ -130,8 +130,7 @@ remap_area_pages(unsigned long start, unsigned long phys_addr, ...@@ -130,8 +130,7 @@ remap_area_pages(unsigned long start, unsigned long phys_addr,
* mapping. See include/asm-arm/proc-armv/pgtable.h for more information. * mapping. See include/asm-arm/proc-armv/pgtable.h for more information.
*/ */
void __iomem * void __iomem *
__ioremap(unsigned long phys_addr, size_t size, unsigned long flags, __ioremap(unsigned long phys_addr, size_t size, unsigned long flags)
unsigned long align)
{ {
void * addr; void * addr;
struct vm_struct * area; struct vm_struct * area;
......
...@@ -40,7 +40,7 @@ ...@@ -40,7 +40,7 @@
#endif #endif
unsigned long pci_probe_only = 1; unsigned long pci_probe_only = 1;
unsigned long pci_assign_all_buses = 0; int pci_assign_all_buses = 0;
/* /*
* legal IO pages under MAX_ISA_PORT. This is to ensure we don't touch * legal IO pages under MAX_ISA_PORT. This is to ensure we don't touch
...@@ -55,11 +55,6 @@ static void fixup_resource(struct resource *res, struct pci_dev *dev); ...@@ -55,11 +55,6 @@ static void fixup_resource(struct resource *res, struct pci_dev *dev);
static void do_bus_setup(struct pci_bus *bus); static void do_bus_setup(struct pci_bus *bus);
#endif #endif
unsigned int pcibios_assign_all_busses(void)
{
return pci_assign_all_buses;
}
/* pci_io_base -- the base address from which io bars are offsets. /* pci_io_base -- the base address from which io bars are offsets.
* This is the lowest I/O base address (so bar values are always positive), * This is the lowest I/O base address (so bar values are always positive),
* and it *must* be the start of ISA space if an ISA bus exists because * and it *must* be the start of ISA space if an ISA bus exists because
...@@ -1186,17 +1181,6 @@ void phbs_remap_io(void) ...@@ -1186,17 +1181,6 @@ void phbs_remap_io(void)
remap_bus_range(hose->bus); remap_bus_range(hose->bus);
} }
/*
* ppc64 can have multifunction devices that do not respond to function 0.
* In this case we must scan all functions.
* XXX this can go now, we use the OF device tree in all the
* cases that caused problems. -- paulus
*/
int pcibios_scan_all_fns(struct pci_bus *bus, int devfn)
{
return 0;
}
static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev) static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
{ {
struct pci_controller *hose = pci_bus_to_host(dev->bus); struct pci_controller *hose = pci_bus_to_host(dev->bus);
......
...@@ -146,9 +146,6 @@ EXPORT_SYMBOL(pci_bus_io_base); ...@@ -146,9 +146,6 @@ EXPORT_SYMBOL(pci_bus_io_base);
EXPORT_SYMBOL(pci_bus_io_base_phys); EXPORT_SYMBOL(pci_bus_io_base_phys);
EXPORT_SYMBOL(pci_bus_mem_base_phys); EXPORT_SYMBOL(pci_bus_mem_base_phys);
EXPORT_SYMBOL(pci_bus_to_hose); EXPORT_SYMBOL(pci_bus_to_hose);
EXPORT_SYMBOL(pci_resource_to_bus);
EXPORT_SYMBOL(pci_phys_to_bus);
EXPORT_SYMBOL(pci_bus_to_phys);
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#ifdef CONFIG_NOT_COHERENT_CACHE #ifdef CONFIG_NOT_COHERENT_CACHE
......
...@@ -36,8 +36,9 @@ ...@@ -36,8 +36,9 @@
#include <asm/page.h> #include <asm/page.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/system.h> #include <asm/system.h>
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
#include <asm/ptrace-common.h> #include "ptrace-common.h"
#endif #endif
#ifdef CONFIG_PPC32 #ifdef CONFIG_PPC32
......
...@@ -33,7 +33,8 @@ ...@@ -33,7 +33,8 @@
#include <asm/page.h> #include <asm/page.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/ptrace-common.h>
#include "ptrace-common.h"
/* /*
* does not yet catch signals sent when the child dies. * does not yet catch signals sent when the child dies.
......
...@@ -14,9 +14,10 @@ ...@@ -14,9 +14,10 @@
#include <asm/pgalloc.h> #include <asm/pgalloc.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/semaphore.h> #include <asm/semaphore.h>
#include <asm/imalloc.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include "mmu_decl.h"
static DECLARE_MUTEX(imlist_sem); static DECLARE_MUTEX(imlist_sem);
struct vm_struct * imlist = NULL; struct vm_struct * imlist = NULL;
......
...@@ -64,7 +64,8 @@ ...@@ -64,7 +64,8 @@
#include <asm/iommu.h> #include <asm/iommu.h>
#include <asm/abs_addr.h> #include <asm/abs_addr.h>
#include <asm/vdso.h> #include <asm/vdso.h>
#include <asm/imalloc.h>
#include "mmu_decl.h"
#ifdef DEBUG #ifdef DEBUG
#define DBG(fmt...) printk(fmt) #define DBG(fmt...) printk(fmt)
......
...@@ -33,7 +33,6 @@ extern void invalidate_tlbcam_entry(int index); ...@@ -33,7 +33,6 @@ extern void invalidate_tlbcam_entry(int index);
extern int __map_without_bats; extern int __map_without_bats;
extern unsigned long ioremap_base; extern unsigned long ioremap_base;
extern unsigned long ioremap_bot;
extern unsigned int rtas_data, rtas_size; extern unsigned int rtas_data, rtas_size;
extern PTE *Hash, *Hash_end; extern PTE *Hash, *Hash_end;
...@@ -42,6 +41,7 @@ extern unsigned long Hash_size, Hash_mask; ...@@ -42,6 +41,7 @@ extern unsigned long Hash_size, Hash_mask;
extern unsigned int num_tlbcam_entries; extern unsigned int num_tlbcam_entries;
#endif #endif
extern unsigned long ioremap_bot;
extern unsigned long __max_low_memory; extern unsigned long __max_low_memory;
extern unsigned long __initial_memory_limit; extern unsigned long __initial_memory_limit;
extern unsigned long total_memory; extern unsigned long total_memory;
...@@ -84,4 +84,16 @@ static inline void flush_HPTE(unsigned context, unsigned long va, ...@@ -84,4 +84,16 @@ static inline void flush_HPTE(unsigned context, unsigned long va,
else else
_tlbie(va); _tlbie(va);
} }
#else /* CONFIG_PPC64 */
/* imalloc region types */
#define IM_REGION_UNUSED 0x1
#define IM_REGION_SUBSET 0x2
#define IM_REGION_EXISTS 0x4
#define IM_REGION_OVERLAP 0x8
#define IM_REGION_SUPERSET 0x10
extern struct vm_struct * im_get_free_area(unsigned long size);
extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
int region_type);
extern void im_free(void *addr);
#endif #endif
...@@ -64,7 +64,8 @@ ...@@ -64,7 +64,8 @@
#include <asm/iommu.h> #include <asm/iommu.h>
#include <asm/abs_addr.h> #include <asm/abs_addr.h>
#include <asm/vdso.h> #include <asm/vdso.h>
#include <asm/imalloc.h>
#include "mmu_decl.h"
unsigned long ioremap_bot = IMALLOC_BASE; unsigned long ioremap_bot = IMALLOC_BASE;
static unsigned long phbs_io_bot = PHBS_IO_BASE; static unsigned long phbs_io_bot = PHBS_IO_BASE;
......
...@@ -34,6 +34,7 @@ ...@@ -34,6 +34,7 @@
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/hardirq.h> #include <linux/hardirq.h>
#include <linux/cpu.h> #include <linux/cpu.h>
#include <linux/compiler.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/atomic.h> #include <asm/atomic.h>
...@@ -631,8 +632,9 @@ void smp_core99_give_timebase(void) ...@@ -631,8 +632,9 @@ void smp_core99_give_timebase(void)
mb(); mb();
/* wait for the secondary to have taken it */ /* wait for the secondary to have taken it */
for (t = 100000; t > 0 && sec_tb_reset; --t) /* note: can't use udelay here, since it needs the timebase running */
udelay(10); for (t = 10000000; t > 0 && sec_tb_reset; --t)
barrier();
if (sec_tb_reset) if (sec_tb_reset)
/* XXX BUG_ON here? */ /* XXX BUG_ON here? */
printk(KERN_WARNING "Timeout waiting sync(2) on second CPU\n"); printk(KERN_WARNING "Timeout waiting sync(2) on second CPU\n");
......
...@@ -361,7 +361,8 @@ static void mpic_enable_irq(unsigned int irq) ...@@ -361,7 +361,8 @@ static void mpic_enable_irq(unsigned int irq)
DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & ~MPIC_VECPRI_MASK); mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) &
~MPIC_VECPRI_MASK);
/* make sure mask gets to controller before we return to user */ /* make sure mask gets to controller before we return to user */
do { do {
...@@ -381,7 +382,8 @@ static void mpic_disable_irq(unsigned int irq) ...@@ -381,7 +382,8 @@ static void mpic_disable_irq(unsigned int irq)
DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src);
mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) | MPIC_VECPRI_MASK); mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) |
MPIC_VECPRI_MASK);
/* make sure mask gets to controller before we return to user */ /* make sure mask gets to controller before we return to user */
do { do {
...@@ -735,12 +737,13 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) ...@@ -735,12 +737,13 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
spin_lock_irqsave(&mpic_lock, flags); spin_lock_irqsave(&mpic_lock, flags);
if (is_ipi) { if (is_ipi) {
reg = mpic_ipi_read(irq - mpic->ipi_offset) & MPIC_VECPRI_PRIORITY_MASK; reg = mpic_ipi_read(irq - mpic->ipi_offset) &
~MPIC_VECPRI_PRIORITY_MASK;
mpic_ipi_write(irq - mpic->ipi_offset, mpic_ipi_write(irq - mpic->ipi_offset,
reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
} else { } else {
reg = mpic_irq_read(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI) reg = mpic_irq_read(irq - mpic->irq_offset,MPIC_IRQ_VECTOR_PRI)
& MPIC_VECPRI_PRIORITY_MASK; & ~MPIC_VECPRI_PRIORITY_MASK;
mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI, mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI,
reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
} }
......
...@@ -36,8 +36,6 @@ ...@@ -36,8 +36,6 @@
#include <asm/hardware.h> /* Pick up IXP2000-specific bits */ #include <asm/hardware.h> /* Pick up IXP2000-specific bits */
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
static struct device_driver ixp2000_i2c_driver;
static inline int ixp2000_scl_pin(void *data) static inline int ixp2000_scl_pin(void *data)
{ {
return ((struct ixp2000_i2c_pins*)data)->scl_pin; return ((struct ixp2000_i2c_pins*)data)->scl_pin;
...@@ -120,7 +118,7 @@ static int ixp2000_i2c_probe(struct platform_device *plat_dev) ...@@ -120,7 +118,7 @@ static int ixp2000_i2c_probe(struct platform_device *plat_dev)
drv_data->algo_data.timeout = 100; drv_data->algo_data.timeout = 100;
drv_data->adapter.id = I2C_HW_B_IXP2000, drv_data->adapter.id = I2C_HW_B_IXP2000,
strlcpy(drv_data->adapter.name, ixp2000_i2c_driver.name, strlcpy(drv_data->adapter.name, plat_dev->dev.driver->name,
I2C_NAME_SIZE); I2C_NAME_SIZE);
drv_data->adapter.algo_data = &drv_data->algo_data, drv_data->adapter.algo_data = &drv_data->algo_data,
...@@ -132,7 +130,7 @@ static int ixp2000_i2c_probe(struct platform_device *plat_dev) ...@@ -132,7 +130,7 @@ static int ixp2000_i2c_probe(struct platform_device *plat_dev)
gpio_line_set(gpio->sda_pin, 0); gpio_line_set(gpio->sda_pin, 0);
if ((err = i2c_bit_add_bus(&drv_data->adapter)) != 0) { if ((err = i2c_bit_add_bus(&drv_data->adapter)) != 0) {
dev_err(dev, "Could not install, error %d\n", err); dev_err(&plat_dev->dev, "Could not install, error %d\n", err);
kfree(drv_data); kfree(drv_data);
return err; return err;
} }
......
...@@ -35,8 +35,6 @@ ...@@ -35,8 +35,6 @@
#include <asm/hardware.h> /* Pick up IXP4xx-specific bits */ #include <asm/hardware.h> /* Pick up IXP4xx-specific bits */
static struct platform_driver ixp4xx_i2c_driver;
static inline int ixp4xx_scl_pin(void *data) static inline int ixp4xx_scl_pin(void *data)
{ {
return ((struct ixp4xx_i2c_pins*)data)->scl_pin; return ((struct ixp4xx_i2c_pins*)data)->scl_pin;
...@@ -128,7 +126,7 @@ static int ixp4xx_i2c_probe(struct platform_device *plat_dev) ...@@ -128,7 +126,7 @@ static int ixp4xx_i2c_probe(struct platform_device *plat_dev)
drv_data->algo_data.timeout = 100; drv_data->algo_data.timeout = 100;
drv_data->adapter.id = I2C_HW_B_IXP4XX; drv_data->adapter.id = I2C_HW_B_IXP4XX;
strlcpy(drv_data->adapter.name, ixp4xx_i2c_driver.driver.name, strlcpy(drv_data->adapter.name, plat_dev->dev.driver->name,
I2C_NAME_SIZE); I2C_NAME_SIZE);
drv_data->adapter.algo_data = &drv_data->algo_data; drv_data->adapter.algo_data = &drv_data->algo_data;
...@@ -140,8 +138,7 @@ static int ixp4xx_i2c_probe(struct platform_device *plat_dev) ...@@ -140,8 +138,7 @@ static int ixp4xx_i2c_probe(struct platform_device *plat_dev)
gpio_line_set(gpio->sda_pin, 0); gpio_line_set(gpio->sda_pin, 0);
if ((err = i2c_bit_add_bus(&drv_data->adapter) != 0)) { if ((err = i2c_bit_add_bus(&drv_data->adapter) != 0)) {
printk(KERN_ERR "ERROR: Could not install %s\n", printk(KERN_ERR "ERROR: Could not install %s\n", plat_dev->dev.bus_id);
plat_dev->dev.bus_id);
kfree(drv_data); kfree(drv_data);
return err; return err;
......
...@@ -3510,8 +3510,8 @@ static void __exit ide_cdrom_exit(void) ...@@ -3510,8 +3510,8 @@ static void __exit ide_cdrom_exit(void)
{ {
driver_unregister(&ide_cdrom_driver.gen_driver); driver_unregister(&ide_cdrom_driver.gen_driver);
} }
static int ide_cdrom_init(void) static int __init ide_cdrom_init(void)
{ {
return driver_register(&ide_cdrom_driver.gen_driver); return driver_register(&ide_cdrom_driver.gen_driver);
} }
......
...@@ -1266,7 +1266,7 @@ static void __exit idedisk_exit (void) ...@@ -1266,7 +1266,7 @@ static void __exit idedisk_exit (void)
driver_unregister(&idedisk_driver.gen_driver); driver_unregister(&idedisk_driver.gen_driver);
} }
static int idedisk_init (void) static int __init idedisk_init(void)
{ {
return driver_register(&idedisk_driver.gen_driver); return driver_register(&idedisk_driver.gen_driver);
} }
......
...@@ -2191,10 +2191,7 @@ static void __exit idefloppy_exit (void) ...@@ -2191,10 +2191,7 @@ static void __exit idefloppy_exit (void)
driver_unregister(&idefloppy_driver.gen_driver); driver_unregister(&idefloppy_driver.gen_driver);
} }
/* static int __init idefloppy_init(void)
* idefloppy_init will register the driver for each floppy.
*/
static int idefloppy_init (void)
{ {
printk("ide-floppy driver " IDEFLOPPY_VERSION "\n"); printk("ide-floppy driver " IDEFLOPPY_VERSION "\n");
return driver_register(&idefloppy_driver.gen_driver); return driver_register(&idefloppy_driver.gen_driver);
......
...@@ -1629,12 +1629,6 @@ EXPORT_SYMBOL(ide_init_drive_cmd); ...@@ -1629,12 +1629,6 @@ EXPORT_SYMBOL(ide_init_drive_cmd);
* for the new rq to be completed. This is VERY DANGEROUS, and is * for the new rq to be completed. This is VERY DANGEROUS, and is
* intended for careful use by the ATAPI tape/cdrom driver code. * intended for careful use by the ATAPI tape/cdrom driver code.
* *
* If action is ide_next, then the rq is queued immediately after
* the currently-being-processed-request (if any), and the function
* returns without waiting for the new rq to be completed. As above,
* This is VERY DANGEROUS, and is intended for careful use by the
* ATAPI tape/cdrom driver code.
*
* If action is ide_end, then the rq is queued at the end of the * If action is ide_end, then the rq is queued at the end of the
* request queue, and the function returns immediately without waiting * request queue, and the function returns immediately without waiting
* for the new rq to be completed. This is again intended for careful * for the new rq to be completed. This is again intended for careful
......
...@@ -4916,10 +4916,7 @@ static void __exit idetape_exit (void) ...@@ -4916,10 +4916,7 @@ static void __exit idetape_exit (void)
unregister_chrdev(IDETAPE_MAJOR, "ht"); unregister_chrdev(IDETAPE_MAJOR, "ht");
} }
/* static int __init idetape_init(void)
* idetape_init will register the driver for each tape.
*/
static int idetape_init (void)
{ {
int error = 1; int error = 1;
idetape_sysfs_class = class_create(THIS_MODULE, "ide_tape"); idetape_sysfs_class = class_create(THIS_MODULE, "ide_tape");
......
...@@ -51,8 +51,6 @@ ...@@ -51,8 +51,6 @@
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/io.h> #include <asm/io.h>
#define DEBUG_TASKFILE 0 /* unset when fixed */
static void ata_bswap_data (void *buffer, int wcount) static void ata_bswap_data (void *buffer, int wcount)
{ {
u16 *p = buffer; u16 *p = buffer;
...@@ -765,9 +763,6 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task) ...@@ -765,9 +763,6 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task)
ide_hwif_t *hwif = HWIF(drive); ide_hwif_t *hwif = HWIF(drive);
task_struct_t *taskfile = (task_struct_t *) task->tfRegister; task_struct_t *taskfile = (task_struct_t *) task->tfRegister;
hob_struct_t *hobfile = (hob_struct_t *) task->hobRegister; hob_struct_t *hobfile = (hob_struct_t *) task->hobRegister;
#if DEBUG_TASKFILE
u8 status;
#endif
if (task->data_phase == TASKFILE_MULTI_IN || if (task->data_phase == TASKFILE_MULTI_IN ||
task->data_phase == TASKFILE_MULTI_OUT) { task->data_phase == TASKFILE_MULTI_OUT) {
...@@ -778,19 +773,13 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task) ...@@ -778,19 +773,13 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task)
} }
/* /*
* (ks) Check taskfile in/out flags. * (ks) Check taskfile in flags.
* If set, then execute as it is defined. * If set, then execute as it is defined.
* If not set, then define default settings. * If not set, then define default settings.
* The default values are: * The default values are:
* write and read all taskfile registers (except data) * read all taskfile registers (except data)
* write and read the hob registers (sector,nsector,lcyl,hcyl) * read the hob registers (sector, nsector, lcyl, hcyl)
*/ */
if (task->tf_out_flags.all == 0) {
task->tf_out_flags.all = IDE_TASKFILE_STD_OUT_FLAGS;
if (drive->addressing == 1)
task->tf_out_flags.all |= (IDE_HOB_STD_OUT_FLAGS << 8);
}
if (task->tf_in_flags.all == 0) { if (task->tf_in_flags.all == 0) {
task->tf_in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; task->tf_in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
if (drive->addressing == 1) if (drive->addressing == 1)
...@@ -803,16 +792,6 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task) ...@@ -803,16 +792,6 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task)
hwif->OUTB(drive->ctl, IDE_CONTROL_REG); hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
SELECT_MASK(drive, 0); SELECT_MASK(drive, 0);
#if DEBUG_TASKFILE
status = hwif->INB(IDE_STATUS_REG);
if (status & 0x80) {
printk("flagged_taskfile -> Bad status. Status = %02x. wait 100 usec ...\n", status);
udelay(100);
status = hwif->INB(IDE_STATUS_REG);
printk("flagged_taskfile -> Status = %02x\n", status);
}
#endif
if (task->tf_out_flags.b.data) { if (task->tf_out_flags.b.data) {
u16 data = taskfile->data + (hobfile->data << 8); u16 data = taskfile->data + (hobfile->data << 8);
hwif->OUTW(data, IDE_DATA_REG); hwif->OUTW(data, IDE_DATA_REG);
......
...@@ -87,6 +87,7 @@ static const struct { ...@@ -87,6 +87,7 @@ static const struct {
u8 chipset_family; u8 chipset_family;
u8 flags; u8 flags;
} SiSHostChipInfo[] = { } SiSHostChipInfo[] = {
{ "SiS965", PCI_DEVICE_ID_SI_965, ATA_133 },
{ "SiS745", PCI_DEVICE_ID_SI_745, ATA_100 }, { "SiS745", PCI_DEVICE_ID_SI_745, ATA_100 },
{ "SiS735", PCI_DEVICE_ID_SI_735, ATA_100 }, { "SiS735", PCI_DEVICE_ID_SI_735, ATA_100 },
{ "SiS733", PCI_DEVICE_ID_SI_733, ATA_100 }, { "SiS733", PCI_DEVICE_ID_SI_733, ATA_100 },
......
...@@ -79,6 +79,7 @@ static struct via_isa_bridge { ...@@ -79,6 +79,7 @@ static struct via_isa_bridge {
u8 rev_max; u8 rev_max;
u16 flags; u16 flags;
} via_isa_bridges[] = { } via_isa_bridges[] = {
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
...@@ -467,24 +468,35 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) ...@@ -467,24 +468,35 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
hwif->drives[1].autodma = hwif->autodma; hwif->drives[1].autodma = hwif->autodma;
} }
static ide_pci_device_t via82cxxx_chipset __devinitdata = { static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
.name = "VP_IDE", { /* 0 */
.init_chipset = init_chipset_via82cxxx, .name = "VP_IDE",
.init_hwif = init_hwif_via82cxxx, .init_chipset = init_chipset_via82cxxx,
.channels = 2, .init_hwif = init_hwif_via82cxxx,
.autodma = NOAUTODMA, .channels = 2,
.enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, .autodma = NOAUTODMA,
.bootable = ON_BOARD, .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
.bootable = ON_BOARD
},{ /* 1 */
.name = "VP_IDE",
.init_chipset = init_chipset_via82cxxx,
.init_hwif = init_hwif_via82cxxx,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
.bootable = ON_BOARD,
}
}; };
static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id) static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{ {
return ide_setup_pci_device(dev, &via82cxxx_chipset); return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]);
} }
static struct pci_device_id via_pci_tbl[] = { static struct pci_device_id via_pci_tbl[] = {
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_6410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ 0, }, { 0, },
}; };
MODULE_DEVICE_TABLE(pci, via_pci_tbl); MODULE_DEVICE_TABLE(pci, via_pci_tbl);
......
...@@ -246,7 +246,7 @@ int __init ipaq_mtd_init(void) ...@@ -246,7 +246,7 @@ int __init ipaq_mtd_init(void)
ipaq_map[i].size = h3xxx_max_flash_size; ipaq_map[i].size = h3xxx_max_flash_size;
ipaq_map[i].set_vpp = h3xxx_set_vpp; ipaq_map[i].set_vpp = h3xxx_set_vpp;
ipaq_map[i].phys = cs_phys[i]; ipaq_map[i].phys = cs_phys[i];
ipaq_map[i].virt = __ioremap(cs_phys[i], 0x04000000, 0, 1); ipaq_map[i].virt = ioremap(cs_phys[i], 0x04000000);
if (machine_is_h3100 () || machine_is_h1900()) if (machine_is_h3100 () || machine_is_h1900())
ipaq_map[i].bankwidth = 2; ipaq_map[i].bankwidth = 2;
} }
...@@ -280,7 +280,7 @@ int __init ipaq_mtd_init(void) ...@@ -280,7 +280,7 @@ int __init ipaq_mtd_init(void)
nb_parts = ARRAY_SIZE(jornada_partitions); nb_parts = ARRAY_SIZE(jornada_partitions);
ipaq_map[0].size = jornada_max_flash_size; ipaq_map[0].size = jornada_max_flash_size;
ipaq_map[0].set_vpp = jornada56x_set_vpp; ipaq_map[0].set_vpp = jornada56x_set_vpp;
ipaq_map[0].virt = (__u32)__ioremap(0x0, 0x04000000, 0, 1); ipaq_map[0].virt = (__u32)ioremap(0x0, 0x04000000);
} }
#endif #endif
#ifdef CONFIG_SA1100_JORNADA720 #ifdef CONFIG_SA1100_JORNADA720
...@@ -442,7 +442,7 @@ static int __init h1900_special_case(void) ...@@ -442,7 +442,7 @@ static int __init h1900_special_case(void)
ipaq_map[0].size = 0x80000; ipaq_map[0].size = 0x80000;
ipaq_map[0].set_vpp = h3xxx_set_vpp; ipaq_map[0].set_vpp = h3xxx_set_vpp;
ipaq_map[0].phys = 0x0; ipaq_map[0].phys = 0x0;
ipaq_map[0].virt = __ioremap(0x0, 0x04000000, 0, 1); ipaq_map[0].virt = ioremap(0x0, 0x04000000);
ipaq_map[0].bankwidth = 2; ipaq_map[0].bankwidth = 2;
printk(KERN_NOTICE "iPAQ flash: probing %d-bit flash bus, window=%lx with JEDEC.\n", ipaq_map[0].bankwidth*8, ipaq_map[0].virt); printk(KERN_NOTICE "iPAQ flash: probing %d-bit flash bus, window=%lx with JEDEC.\n", ipaq_map[0].bankwidth*8, ipaq_map[0].virt);
......
...@@ -159,12 +159,12 @@ static int ixp2000_flash_probe(struct platform_device *dev) ...@@ -159,12 +159,12 @@ static int ixp2000_flash_probe(struct platform_device *dev)
return -ENODEV; return -ENODEV;
window_size = dev->resource->end - dev->resource->start + 1; window_size = dev->resource->end - dev->resource->start + 1;
dev_info(_dev, "Probe of IXP2000 flash(%d banks x %dMiB)\n", dev_info(&dev->dev, "Probe of IXP2000 flash(%d banks x %dMiB)\n",
ixp_data->nr_banks, ((u32)window_size >> 20)); ixp_data->nr_banks, ((u32)window_size >> 20));
if (plat->width != 1) { if (plat->width != 1) {
dev_err(_dev, "IXP2000 MTD map only supports 8-bit mode, asking for %d\n", dev_err(&dev->dev, "IXP2000 MTD map only supports 8-bit mode, asking for %d\n",
plat->width * 8); plat->width * 8);
return -EIO; return -EIO;
} }
...@@ -202,7 +202,7 @@ static int ixp2000_flash_probe(struct platform_device *dev) ...@@ -202,7 +202,7 @@ static int ixp2000_flash_probe(struct platform_device *dev)
dev->resource->end - dev->resource->start + 1, dev->resource->end - dev->resource->start + 1,
dev->dev.bus_id); dev->dev.bus_id);
if (!info->res) { if (!info->res) {
dev_err(_dev, "Could not reserve memory region\n"); dev_err(&dev->dev, "Could not reserve memory region\n");
err = -ENOMEM; err = -ENOMEM;
goto Error; goto Error;
} }
...@@ -210,7 +210,7 @@ static int ixp2000_flash_probe(struct platform_device *dev) ...@@ -210,7 +210,7 @@ static int ixp2000_flash_probe(struct platform_device *dev)
info->map.map_priv_1 = (unsigned long) ioremap(dev->resource->start, info->map.map_priv_1 = (unsigned long) ioremap(dev->resource->start,
dev->resource->end - dev->resource->start + 1); dev->resource->end - dev->resource->start + 1);
if (!info->map.map_priv_1) { if (!info->map.map_priv_1) {
dev_err(_dev, "Failed to ioremap flash region\n"); dev_err(&dev->dev, "Failed to ioremap flash region\n");
err = -EIO; err = -EIO;
goto Error; goto Error;
} }
...@@ -221,13 +221,13 @@ static int ixp2000_flash_probe(struct platform_device *dev) ...@@ -221,13 +221,13 @@ static int ixp2000_flash_probe(struct platform_device *dev)
*/ */
erratum44_workaround = ixp2000_has_broken_slowport(); erratum44_workaround = ixp2000_has_broken_slowport();
dev_info(_dev, "Erratum 44 workaround %s\n", dev_info(&dev->dev, "Erratum 44 workaround %s\n",
erratum44_workaround ? "enabled" : "disabled"); erratum44_workaround ? "enabled" : "disabled");
#endif #endif
info->mtd = do_map_probe(plat->map_name, &info->map); info->mtd = do_map_probe(plat->map_name, &info->map);
if (!info->mtd) { if (!info->mtd) {
dev_err(_dev, "map_probe failed\n"); dev_err(&dev->dev, "map_probe failed\n");
err = -ENXIO; err = -ENXIO;
goto Error; goto Error;
} }
...@@ -237,7 +237,7 @@ static int ixp2000_flash_probe(struct platform_device *dev) ...@@ -237,7 +237,7 @@ static int ixp2000_flash_probe(struct platform_device *dev)
if (err > 0) { if (err > 0) {
err = add_mtd_partitions(info->mtd, info->partitions, err); err = add_mtd_partitions(info->mtd, info->partitions, err);
if(err) if(err)
dev_err(_dev, "Could not parse partitions\n"); dev_err(&dev->dev, "Could not parse partitions\n");
} }
if (err) if (err)
...@@ -251,8 +251,8 @@ static int ixp2000_flash_probe(struct platform_device *dev) ...@@ -251,8 +251,8 @@ static int ixp2000_flash_probe(struct platform_device *dev)
} }
static struct platform_driver ixp2000_flash_driver = { static struct platform_driver ixp2000_flash_driver = {
.probe = &ixp2000_flash_probe, .probe = ixp2000_flash_probe,
.remove = &ixp2000_flash_remove .remove = ixp2000_flash_remove,
.driver = { .driver = {
.name = "IXP2000-Flash", .name = "IXP2000-Flash",
}, },
......
...@@ -112,7 +112,7 @@ static int __init h1910_init (void) ...@@ -112,7 +112,7 @@ static int __init h1910_init (void)
if (!machine_is_h1900()) if (!machine_is_h1900())
return -ENODEV; return -ENODEV;
nandaddr = __ioremap(0x08000000, 0x1000, 0, 1); nandaddr = ioremap(0x08000000, 0x1000);
if (!nandaddr) { if (!nandaddr) {
printk("Failed to ioremap nand flash.\n"); printk("Failed to ioremap nand flash.\n");
return -ENOMEM; return -ENOMEM;
......
...@@ -49,7 +49,6 @@ ...@@ -49,7 +49,6 @@
#include <linux/serial.h> #include <linux/serial.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/irq.h>
#include <asm/sizes.h> #include <asm/sizes.h>
#include <asm/hardware/amba.h> #include <asm/hardware/amba.h>
#include <asm/hardware/clock.h> #include <asm/hardware/clock.h>
...@@ -63,7 +62,8 @@ ...@@ -63,7 +62,8 @@
#define AMBA_ISR_PASS_LIMIT 256 #define AMBA_ISR_PASS_LIMIT 256
#define UART_DUMMY_RSR_RX 256 #define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE)
#define UART_DUMMY_DR_RX (1 << 16)
/* /*
* We wrap our port structure around the generic uart_port. * We wrap our port structure around the generic uart_port.
...@@ -116,7 +116,7 @@ pl011_rx_chars(struct uart_amba_port *uap) ...@@ -116,7 +116,7 @@ pl011_rx_chars(struct uart_amba_port *uap)
#endif #endif
{ {
struct tty_struct *tty = uap->port.info->tty; struct tty_struct *tty = uap->port.info->tty;
unsigned int status, ch, flag, rsr, max_count = 256; unsigned int status, ch, flag, max_count = 256;
status = readw(uap->port.membase + UART01x_FR); status = readw(uap->port.membase + UART01x_FR);
while ((status & UART01x_FR_RXFE) == 0 && max_count--) { while ((status & UART01x_FR_RXFE) == 0 && max_count--) {
...@@ -129,7 +129,7 @@ pl011_rx_chars(struct uart_amba_port *uap) ...@@ -129,7 +129,7 @@ pl011_rx_chars(struct uart_amba_port *uap)
*/ */
} }
ch = readw(uap->port.membase + UART01x_DR); ch = readw(uap->port.membase + UART01x_DR) | UART_DUMMY_DR_RX;
flag = TTY_NORMAL; flag = TTY_NORMAL;
uap->port.icount.rx++; uap->port.icount.rx++;
...@@ -137,34 +137,33 @@ pl011_rx_chars(struct uart_amba_port *uap) ...@@ -137,34 +137,33 @@ pl011_rx_chars(struct uart_amba_port *uap)
* Note that the error handling code is * Note that the error handling code is
* out of the main execution path * out of the main execution path
*/ */
rsr = readw(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX; if (unlikely(ch & UART_DR_ERROR)) {
if (unlikely(rsr & UART01x_RSR_ANY)) { if (ch & UART011_DR_BE) {
if (rsr & UART01x_RSR_BE) { ch &= ~(UART011_DR_FE | UART011_DR_PE);
rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
uap->port.icount.brk++; uap->port.icount.brk++;
if (uart_handle_break(&uap->port)) if (uart_handle_break(&uap->port))
goto ignore_char; goto ignore_char;
} else if (rsr & UART01x_RSR_PE) } else if (ch & UART011_DR_PE)
uap->port.icount.parity++; uap->port.icount.parity++;
else if (rsr & UART01x_RSR_FE) else if (ch & UART011_DR_FE)
uap->port.icount.frame++; uap->port.icount.frame++;
if (rsr & UART01x_RSR_OE) if (ch & UART011_DR_OE)
uap->port.icount.overrun++; uap->port.icount.overrun++;
rsr &= uap->port.read_status_mask; ch &= uap->port.read_status_mask;
if (rsr & UART01x_RSR_BE) if (ch & UART011_DR_BE)
flag = TTY_BREAK; flag = TTY_BREAK;
else if (rsr & UART01x_RSR_PE) else if (ch & UART011_DR_PE)
flag = TTY_PARITY; flag = TTY_PARITY;
else if (rsr & UART01x_RSR_FE) else if (ch & UART011_DR_FE)
flag = TTY_FRAME; flag = TTY_FRAME;
} }
if (uart_handle_sysrq_char(&uap->port, ch, regs)) if (uart_handle_sysrq_char(&uap->port, ch, regs))
goto ignore_char; goto ignore_char;
uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag); uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag);
ignore_char: ignore_char:
status = readw(uap->port.membase + UART01x_FR); status = readw(uap->port.membase + UART01x_FR);
...@@ -476,33 +475,33 @@ pl011_set_termios(struct uart_port *port, struct termios *termios, ...@@ -476,33 +475,33 @@ pl011_set_termios(struct uart_port *port, struct termios *termios,
*/ */
uart_update_timeout(port, termios->c_cflag, baud); uart_update_timeout(port, termios->c_cflag, baud);
port->read_status_mask = UART01x_RSR_OE; port->read_status_mask = UART011_DR_OE | 255;
if (termios->c_iflag & INPCK) if (termios->c_iflag & INPCK)
port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; port->read_status_mask |= UART011_DR_FE | UART011_DR_PE;
if (termios->c_iflag & (BRKINT | PARMRK)) if (termios->c_iflag & (BRKINT | PARMRK))
port->read_status_mask |= UART01x_RSR_BE; port->read_status_mask |= UART011_DR_BE;
/* /*
* Characters to ignore * Characters to ignore
*/ */
port->ignore_status_mask = 0; port->ignore_status_mask = 0;
if (termios->c_iflag & IGNPAR) if (termios->c_iflag & IGNPAR)
port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; port->ignore_status_mask |= UART011_DR_FE | UART011_DR_PE;
if (termios->c_iflag & IGNBRK) { if (termios->c_iflag & IGNBRK) {
port->ignore_status_mask |= UART01x_RSR_BE; port->ignore_status_mask |= UART011_DR_BE;
/* /*
* If we're ignoring parity and break indicators, * If we're ignoring parity and break indicators,
* ignore overruns too (for real raw support). * ignore overruns too (for real raw support).
*/ */
if (termios->c_iflag & IGNPAR) if (termios->c_iflag & IGNPAR)
port->ignore_status_mask |= UART01x_RSR_OE; port->ignore_status_mask |= UART011_DR_OE;
} }
/* /*
* Ignore all characters if CREAD is not set. * Ignore all characters if CREAD is not set.
*/ */
if ((termios->c_cflag & CREAD) == 0) if ((termios->c_cflag & CREAD) == 0)
port->ignore_status_mask |= UART_DUMMY_RSR_RX; port->ignore_status_mask |= UART_DUMMY_DR_RX;
if (UART_ENABLE_MS(port, termios->c_cflag)) if (UART_ENABLE_MS(port, termios->c_cflag))
pl011_enable_ms(port); pl011_enable_ms(port);
......
...@@ -161,7 +161,6 @@ static void sa1100_stop_tx(struct uart_port *port) ...@@ -161,7 +161,6 @@ static void sa1100_stop_tx(struct uart_port *port)
static void sa1100_start_tx(struct uart_port *port) static void sa1100_start_tx(struct uart_port *port)
{ {
struct sa1100_port *sport = (struct sa1100_port *)port; struct sa1100_port *sport = (struct sa1100_port *)port;
unsigned long flags;
u32 utcr3; u32 utcr3;
utcr3 = UART_GET_UTCR3(sport); utcr3 = UART_GET_UTCR3(sport);
......
...@@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); ...@@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
* fallback to the default. * fallback to the default.
*/ */
static inline void __iomem * static inline void __iomem *
__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align) __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
{ {
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
if((addr < 0x48000000) || (addr > 0x4fffffff)) if((addr < 0x48000000) || (addr > 0x4fffffff))
return __ioremap(addr, size, flags, align); return __ioremap(addr, size, flags);
return (void *)addr; return (void *)addr;
} }
...@@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned ...@@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned
static inline void static inline void
__ixp4xx_iounmap(void __iomem *addr) __ixp4xx_iounmap(void __iomem *addr)
{ {
extern void __iounmap(void __iomem *addr);
if ((u32)addr >= VMALLOC_START) if ((u32)addr >= VMALLOC_START)
__iounmap(addr); __iounmap(addr);
} }
#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) #define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f)
#define __arch_iounmap(a) __ixp4xx_iounmap(a) #define __arch_iounmap(a) __ixp4xx_iounmap(a)
#define writeb(v, p) __ixp4xx_writeb(v, p) #define writeb(v, p) __ixp4xx_writeb(v, p)
......
...@@ -50,6 +50,11 @@ ...@@ -50,6 +50,11 @@
#define UART011_ICR 0x44 /* Interrupt clear register. */ #define UART011_ICR 0x44 /* Interrupt clear register. */
#define UART011_DMACR 0x48 /* DMA control register. */ #define UART011_DMACR 0x48 /* DMA control register. */
#define UART011_DR_OE (1 << 11)
#define UART011_DR_BE (1 << 10)
#define UART011_DR_PE (1 << 9)
#define UART011_DR_FE (1 << 8)
#define UART01x_RSR_OE 0x08 #define UART01x_RSR_OE 0x08
#define UART01x_RSR_BE 0x04 #define UART01x_RSR_BE 0x04
#define UART01x_RSR_PE 0x02 #define UART01x_RSR_PE 0x02
......
...@@ -54,6 +54,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen); ...@@ -54,6 +54,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a)) #define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) #define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
/*
* Architecture ioremap implementation.
*/
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
extern void __iounmap(void __iomem *addr);
/* /*
* Bad read/write accesses... * Bad read/write accesses...
*/ */
...@@ -256,18 +262,15 @@ check_signature(void __iomem *io_addr, const unsigned char *signature, ...@@ -256,18 +262,15 @@ check_signature(void __iomem *io_addr, const unsigned char *signature,
* ioremap takes a PCI memory address, as specified in * ioremap takes a PCI memory address, as specified in
* Documentation/IO-mapping.txt. * Documentation/IO-mapping.txt.
*/ */
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
extern void __iounmap(void __iomem *addr);
#ifndef __arch_ioremap #ifndef __arch_ioremap
#define ioremap(cookie,size) __ioremap(cookie,size,0,1) #define ioremap(cookie,size) __ioremap(cookie,size,0)
#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1) #define ioremap_nocache(cookie,size) __ioremap(cookie,size,0)
#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1) #define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE)
#define iounmap(cookie) __iounmap(cookie) #define iounmap(cookie) __iounmap(cookie)
#else #else
#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1) #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0)
#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1) #define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0)
#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1) #define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
#define iounmap(cookie) __arch_iounmap(cookie) #define iounmap(cookie) __arch_iounmap(cookie)
#endif #endif
......
...@@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs) ...@@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs)
extern int __get_user_1(void *); extern int __get_user_1(void *);
extern int __get_user_2(void *); extern int __get_user_2(void *);
extern int __get_user_4(void *); extern int __get_user_4(void *);
extern int __get_user_8(void *);
extern int __get_user_bad(void); extern int __get_user_bad(void);
#define __get_user_x(__r2,__p,__e,__s,__i...) \ #define __get_user_x(__r2,__p,__e,__s,__i...) \
...@@ -114,7 +113,7 @@ extern int __get_user_bad(void); ...@@ -114,7 +113,7 @@ extern int __get_user_bad(void);
#define get_user(x,p) \ #define get_user(x,p) \
({ \ ({ \
const register typeof(*(p)) __user *__p asm("r0") = (p);\ const register typeof(*(p)) __user *__p asm("r0") = (p);\
register typeof(*(p)) __r2 asm("r2"); \ register unsigned int __r2 asm("r2"); \
register int __e asm("r0"); \ register int __e asm("r0"); \
switch (sizeof(*(__p))) { \ switch (sizeof(*(__p))) { \
case 1: \ case 1: \
...@@ -126,12 +125,9 @@ extern int __get_user_bad(void); ...@@ -126,12 +125,9 @@ extern int __get_user_bad(void);
case 4: \ case 4: \
__get_user_x(__r2, __p, __e, 4, "lr"); \ __get_user_x(__r2, __p, __e, 4, "lr"); \
break; \ break; \
case 8: \
__get_user_x(__r2, __p, __e, 8, "lr"); \
break; \
default: __e = __get_user_bad(); break; \ default: __e = __get_user_bad(); break; \
} \ } \
x = __r2; \ x = (typeof(*(p))) __r2; \
__e; \ __e; \
}) })
......
/* /*
* This is based on both include/asm-sh/dma-mapping.h and * Copyright (C) 2004 IBM
* include/asm-ppc/pci.h *
* Implements the generic device dma API for powerpc.
* the pci and vio busses
*/ */
#ifndef __ASM_PPC_DMA_MAPPING_H #ifndef _ASM_DMA_MAPPING_H
#define __ASM_PPC_DMA_MAPPING_H #define _ASM_DMA_MAPPING_H
#include <linux/config.h> #include <linux/config.h>
#include <linux/types.h>
#include <linux/cache.h>
/* need struct page definitions */ /* need struct page definitions */
#include <linux/mm.h> #include <linux/mm.h>
#include <asm/scatterlist.h> #include <asm/scatterlist.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/bug.h>
#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
#ifdef CONFIG_NOT_COHERENT_CACHE #ifdef CONFIG_NOT_COHERENT_CACHE
/* /*
...@@ -24,22 +31,12 @@ extern void __dma_free_coherent(size_t size, void *vaddr); ...@@ -24,22 +31,12 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
extern void __dma_sync(void *vaddr, size_t size, int direction); extern void __dma_sync(void *vaddr, size_t size, int direction);
extern void __dma_sync_page(struct page *page, unsigned long offset, extern void __dma_sync_page(struct page *page, unsigned long offset,
size_t size, int direction); size_t size, int direction);
#define dma_cache_inv(_start,_size) \
invalidate_dcache_range(_start, (_start + _size))
#define dma_cache_wback(_start,_size) \
clean_dcache_range(_start, (_start + _size))
#define dma_cache_wback_inv(_start,_size) \
flush_dcache_range(_start, (_start + _size))
#else /* ! CONFIG_NOT_COHERENT_CACHE */ #else /* ! CONFIG_NOT_COHERENT_CACHE */
/* /*
* Cache coherent cores. * Cache coherent cores.
*/ */
#define dma_cache_inv(_start,_size) do { } while (0)
#define dma_cache_wback(_start,_size) do { } while (0)
#define dma_cache_wback_inv(_start,_size) do { } while (0)
#define __dma_alloc_coherent(gfp, size, handle) NULL #define __dma_alloc_coherent(gfp, size, handle) NULL
#define __dma_free_coherent(size, addr) do { } while (0) #define __dma_free_coherent(size, addr) do { } while (0)
#define __dma_sync(addr, size, rw) do { } while (0) #define __dma_sync(addr, size, rw) do { } while (0)
...@@ -47,6 +44,30 @@ extern void __dma_sync_page(struct page *page, unsigned long offset, ...@@ -47,6 +44,30 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
#endif /* ! CONFIG_NOT_COHERENT_CACHE */ #endif /* ! CONFIG_NOT_COHERENT_CACHE */
#ifdef CONFIG_PPC64
extern int dma_supported(struct device *dev, u64 mask);
extern int dma_set_mask(struct device *dev, u64 dma_mask);
extern void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag);
extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
dma_addr_t dma_handle);
extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
size_t size, enum dma_data_direction direction);
extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
size_t size, enum dma_data_direction direction);
extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size,
enum dma_data_direction direction);
extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
size_t size, enum dma_data_direction direction);
extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction direction);
extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
int nhwentries, enum dma_data_direction direction);
#else /* CONFIG_PPC64 */
#define dma_supported(dev, mask) (1) #define dma_supported(dev, mask) (1)
static inline int dma_set_mask(struct device *dev, u64 dma_mask) static inline int dma_set_mask(struct device *dev, u64 dma_mask)
...@@ -144,29 +165,27 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, ...@@ -144,29 +165,27 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
/* We don't do anything here. */ /* We don't do anything here. */
#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) #define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
static inline void #endif /* CONFIG_PPC64 */
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
size_t size, static inline void dma_sync_single_for_cpu(struct device *dev,
enum dma_data_direction direction) dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{ {
BUG_ON(direction == DMA_NONE); BUG_ON(direction == DMA_NONE);
__dma_sync(bus_to_virt(dma_handle), size, direction); __dma_sync(bus_to_virt(dma_handle), size, direction);
} }
static inline void static inline void dma_sync_single_for_device(struct device *dev,
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, dma_addr_t dma_handle, size_t size,
size_t size, enum dma_data_direction direction)
enum dma_data_direction direction)
{ {
BUG_ON(direction == DMA_NONE); BUG_ON(direction == DMA_NONE);
__dma_sync(bus_to_virt(dma_handle), size, direction); __dma_sync(bus_to_virt(dma_handle), size, direction);
} }
static inline void static inline void dma_sync_sg_for_cpu(struct device *dev,
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, struct scatterlist *sg, int nents,
enum dma_data_direction direction) enum dma_data_direction direction)
{ {
int i; int i;
...@@ -176,9 +195,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, ...@@ -176,9 +195,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
__dma_sync_page(sg->page, sg->offset, sg->length, direction); __dma_sync_page(sg->page, sg->offset, sg->length, direction);
} }
static inline void static inline void dma_sync_sg_for_device(struct device *dev,
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, struct scatterlist *sg, int nents,
enum dma_data_direction direction) enum dma_data_direction direction)
{ {
int i; int i;
...@@ -188,6 +207,15 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, ...@@ -188,6 +207,15 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
__dma_sync_page(sg->page, sg->offset, sg->length, direction); __dma_sync_page(sg->page, sg->offset, sg->length, direction);
} }
static inline int dma_mapping_error(dma_addr_t dma_addr)
{
#ifdef CONFIG_PPC64
return (dma_addr == DMA_ERROR_CODE);
#else
return 0;
#endif
}
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
#ifdef CONFIG_NOT_COHERENT_CACHE #ifdef CONFIG_NOT_COHERENT_CACHE
...@@ -198,40 +226,60 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, ...@@ -198,40 +226,60 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
static inline int dma_get_cache_alignment(void) static inline int dma_get_cache_alignment(void)
{ {
#ifdef CONFIG_PPC64
/* no easy way to get cache size on all processors, so return
* the maximum possible, to be safe */
return (1 << L1_CACHE_SHIFT_MAX);
#else
/* /*
* Each processor family will define its own L1_CACHE_SHIFT, * Each processor family will define its own L1_CACHE_SHIFT,
* L1_CACHE_BYTES wraps to this, so this is always safe. * L1_CACHE_BYTES wraps to this, so this is always safe.
*/ */
return L1_CACHE_BYTES; return L1_CACHE_BYTES;
#endif
} }
static inline void static inline void dma_sync_single_range_for_cpu(struct device *dev,
dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, dma_addr_t dma_handle, unsigned long offset, size_t size,
unsigned long offset, size_t size, enum dma_data_direction direction)
enum dma_data_direction direction)
{ {
/* just sync everything for now */ /* just sync everything for now */
dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
} }
static inline void static inline void dma_sync_single_range_for_device(struct device *dev,
dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, dma_addr_t dma_handle, unsigned long offset, size_t size,
unsigned long offset, size_t size, enum dma_data_direction direction)
enum dma_data_direction direction)
{ {
/* just sync everything for now */ /* just sync everything for now */
dma_sync_single_for_device(dev, dma_handle, offset + size, direction); dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
} }
static inline void dma_cache_sync(void *vaddr, size_t size, static inline void dma_cache_sync(void *vaddr, size_t size,
enum dma_data_direction direction) enum dma_data_direction direction)
{ {
BUG_ON(direction == DMA_NONE);
__dma_sync(vaddr, size, (int)direction); __dma_sync(vaddr, size, (int)direction);
} }
static inline int dma_mapping_error(dma_addr_t dma_addr) /*
{ * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
return 0; */
} struct dma_mapping_ops {
void * (*alloc_coherent)(struct device *dev, size_t size,
#endif /* __ASM_PPC_DMA_MAPPING_H */ dma_addr_t *dma_handle, gfp_t flag);
void (*free_coherent)(struct device *dev, size_t size,
void *vaddr, dma_addr_t dma_handle);
dma_addr_t (*map_single)(struct device *dev, void *ptr,
size_t size, enum dma_data_direction direction);
void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
size_t size, enum dma_data_direction direction);
int (*map_sg)(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction);
void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction);
int (*dma_supported)(struct device *dev, u64 mask);
int (*dac_dma_supported)(struct device *dev, u64 mask);
};
#endif /* _ASM_DMA_MAPPING_H */
#ifndef _PPC64_IO_H #ifndef _ASM_POWERPC_IO_H
#define _PPC64_IO_H #define _ASM_POWERPC_IO_H
/* /*
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
...@@ -8,7 +8,10 @@ ...@@ -8,7 +8,10 @@
* 2 of the License, or (at your option) any later version. * 2 of the License, or (at your option) any later version.
*/ */
#include <linux/config.h> #ifndef CONFIG_PPC64
#include <asm-ppc/io.h>
#else
#include <linux/compiler.h> #include <linux/compiler.h>
#include <asm/page.h> #include <asm/page.h>
#include <asm/byteorder.h> #include <asm/byteorder.h>
...@@ -455,4 +458,5 @@ extern int check_legacy_ioport(unsigned long base_port); ...@@ -455,4 +458,5 @@ extern int check_legacy_ioport(unsigned long base_port);
#endif /* __KERNEL__ */ #endif /* __KERNEL__ */
#endif /* _PPC64_IO_H */ #endif /* CONFIG_PPC64 */
#endif /* _ASM_POWERPC_IO_H */
#ifndef _ASM_POWERPC_MMU_H_
#define _ASM_POWERPC_MMU_H_
#ifndef CONFIG_PPC64
#include <asm-ppc/mmu.h>
#else
/* /*
* PowerPC memory management structures * PowerPC memory management structures
* *
...@@ -10,10 +17,6 @@ ...@@ -10,10 +17,6 @@
* 2 of the License, or (at your option) any later version. * 2 of the License, or (at your option) any later version.
*/ */
#ifndef _PPC64_MMU_H_
#define _PPC64_MMU_H_
#include <linux/config.h>
#include <asm/asm-compat.h> #include <asm/asm-compat.h>
#include <asm/page.h> #include <asm/page.h>
...@@ -392,4 +395,5 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea) ...@@ -392,4 +395,5 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
#endif /* __ASSEMBLY */ #endif /* __ASSEMBLY */
#endif /* _PPC64_MMU_H_ */ #endif /* CONFIG_PPC64 */
#endif /* _ASM_POWERPC_MMU_H_ */
#ifndef __PPC64_MMU_CONTEXT_H #ifndef __ASM_POWERPC_MMU_CONTEXT_H
#define __PPC64_MMU_CONTEXT_H #define __ASM_POWERPC_MMU_CONTEXT_H
#ifndef CONFIG_PPC64
#include <asm-ppc/mmu_context.h>
#else
#include <linux/config.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/mm.h> #include <linux/mm.h>
#include <asm/mmu.h> #include <asm/mmu.h>
...@@ -82,4 +85,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) ...@@ -82,4 +85,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
local_irq_restore(flags); local_irq_restore(flags);
} }
#endif /* __PPC64_MMU_CONTEXT_H */ #endif /* CONFIG_PPC64 */
#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
#ifdef __KERNEL__ #ifndef _ASM_POWERPC_PCI_BRIDGE_H
#ifndef _ASM_PCI_BRIDGE_H #define _ASM_POWERPC_PCI_BRIDGE_H
#define _ASM_PCI_BRIDGE_H
#ifndef CONFIG_PPC64
#include <asm-ppc/pci-bridge.h>
#else
#include <linux/config.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/list.h> #include <linux/list.h>
...@@ -147,5 +149,5 @@ extern void pcibios_free_controller(struct pci_controller *phb); ...@@ -147,5 +149,5 @@ extern void pcibios_free_controller(struct pci_controller *phb);
#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
#endif /* CONFIG_PPC64 */
#endif #endif
#endif /* __KERNEL__ */
#ifndef __PPC64_PCI_H #ifndef __ASM_POWERPC_PCI_H
#define __PPC64_PCI_H #define __ASM_POWERPC_PCI_H
#ifdef __KERNEL__ #ifdef __KERNEL__
/* /*
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <asm/scatterlist.h> #include <asm/scatterlist.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/prom.h> #include <asm/prom.h>
#include <asm/pci-bridge.h>
#include <asm-generic/pci-dma-compat.h> #include <asm-generic/pci-dma-compat.h>
...@@ -26,11 +27,21 @@ ...@@ -26,11 +27,21 @@
struct pci_dev; struct pci_dev;
#ifdef CONFIG_PPC_ISERIES /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
#define IOBASE_BRIDGE_NUMBER 0
#define IOBASE_MEMORY 1
#define IOBASE_IO 2
#define IOBASE_ISA_IO 3
#define IOBASE_ISA_MEM 4
/*
* Set this to 1 if you want the kernel to re-assign all PCI
* bus numbers
*/
extern int pci_assign_all_buses;
#define pcibios_assign_all_busses() (pci_assign_all_buses)
#define pcibios_scan_all_fns(a, b) 0 #define pcibios_scan_all_fns(a, b) 0
#else
extern int pcibios_scan_all_fns(struct pci_bus *bus, int devfn);
#endif
static inline void pcibios_set_master(struct pci_dev *dev) static inline void pcibios_set_master(struct pci_dev *dev)
{ {
...@@ -50,6 +61,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) ...@@ -50,6 +61,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
return channel ? 15 : 14; return channel ? 15 : 14;
} }
#ifdef CONFIG_PPC64
#define HAVE_ARCH_PCI_MWI 1 #define HAVE_ARCH_PCI_MWI 1
static inline int pcibios_prep_mwi(struct pci_dev *dev) static inline int pcibios_prep_mwi(struct pci_dev *dev)
{ {
...@@ -64,12 +76,10 @@ static inline int pcibios_prep_mwi(struct pci_dev *dev) ...@@ -64,12 +76,10 @@ static inline int pcibios_prep_mwi(struct pci_dev *dev)
return 0; return 0;
} }
extern unsigned int pcibios_assign_all_busses(void);
extern struct dma_mapping_ops pci_dma_ops; extern struct dma_mapping_ops pci_dma_ops;
/* For DAC DMA, we currently don't support it by default, but /* For DAC DMA, we currently don't support it by default, but
* we let the platform override this * we let 64-bit platforms override this.
*/ */
static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask) static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
{ {
...@@ -102,6 +112,35 @@ extern int pci_domain_nr(struct pci_bus *bus); ...@@ -102,6 +112,35 @@ extern int pci_domain_nr(struct pci_bus *bus);
/* Decide whether to display the domain number in /proc */ /* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus); extern int pci_proc_domain(struct pci_bus *bus);
#else /* 32-bit */
#ifdef CONFIG_PCI
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
enum pci_dma_burst_strategy *strat,
unsigned long *strategy_parameter)
{
*strat = PCI_DMA_BURST_INFINITY;
*strategy_parameter = ~0UL;
}
#endif
/*
* At present there are very few 32-bit PPC machines that can have
* memory above the 4GB point, and we don't support that.
*/
#define pci_dac_dma_supported(pci_dev, mask) (0)
/* Return the index of the PCI controller for device PDEV. */
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
/* Set the name of the bus as it appears in /proc/bus/pci */
static inline int pci_proc_domain(struct pci_bus *bus)
{
return 0;
}
#endif /* CONFIG_PPC64 */
struct vm_area_struct; struct vm_area_struct;
/* Map a range of PCI memory or I/O space for a device into user space */ /* Map a range of PCI memory or I/O space for a device into user space */
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
...@@ -110,6 +149,7 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, ...@@ -110,6 +149,7 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
#define HAVE_PCI_MMAP 1 #define HAVE_PCI_MMAP 1
#ifdef CONFIG_PPC64
/* pci_unmap_{single,page} is not a nop, thus... */ /* pci_unmap_{single,page} is not a nop, thus... */
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
dma_addr_t ADDR_NAME; dma_addr_t ADDR_NAME;
...@@ -124,22 +164,40 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, ...@@ -124,22 +164,40 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
(((PTR)->LEN_NAME) = (VAL)) (((PTR)->LEN_NAME) = (VAL))
/* The PCI address space does equal the physical memory /* The PCI address space does not equal the physical memory address
* address space. The networking and block device layers use * space (we have an IOMMU). The IDE and SCSI device layers use
* this boolean for bounce buffer decisions. * this boolean for bounce buffer decisions.
*/ */
#define PCI_DMA_BUS_IS_PHYS (0) #define PCI_DMA_BUS_IS_PHYS (0)
#else /* 32-bit */
/* The PCI address space does equal the physical memory
* address space (no IOMMU). The IDE and SCSI device layers use
* this boolean for bounce buffer decisions.
*/
#define PCI_DMA_BUS_IS_PHYS (1)
/* pci_unmap_{page,single} is a nop so... */
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
#define pci_unmap_addr(PTR, ADDR_NAME) (0)
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
#define pci_unmap_len(PTR, LEN_NAME) (0)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
#endif /* CONFIG_PPC64 */
extern void extern void pcibios_resource_to_bus(struct pci_dev *dev,
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, struct pci_bus_region *region,
struct resource *res); struct resource *res);
extern void extern void pcibios_bus_to_resource(struct pci_dev *dev,
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, struct resource *res,
struct pci_bus_region *region); struct pci_bus_region *region);
static inline struct resource * static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
pcibios_select_root(struct pci_dev *pdev, struct resource *res) struct resource *res)
{ {
struct resource *root = NULL; struct resource *root = NULL;
...@@ -151,14 +209,12 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res) ...@@ -151,14 +209,12 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
return root; return root;
} }
extern int extern int unmap_bus_range(struct pci_bus *bus);
unmap_bus_range(struct pci_bus *bus);
extern int extern int remap_bus_range(struct pci_bus *bus);
remap_bus_range(struct pci_bus *bus);
extern void extern void pcibios_fixup_device_resources(struct pci_dev *dev,
pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus); struct pci_bus *bus);
extern struct pci_controller *init_phb_dynamic(struct device_node *dn); extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
...@@ -180,14 +236,12 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file, ...@@ -180,14 +236,12 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file,
unsigned long size, unsigned long size,
pgprot_t prot); pgprot_t prot);
#ifdef CONFIG_PPC_MULTIPLATFORM #if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32)
#define HAVE_ARCH_PCI_RESOURCE_TO_USER #define HAVE_ARCH_PCI_RESOURCE_TO_USER
extern void pci_resource_to_user(const struct pci_dev *dev, int bar, extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
const struct resource *rsrc, const struct resource *rsrc,
u64 *start, u64 *end); u64 *start, u64 *end);
#endif /* CONFIG_PPC_MULTIPLATFORM */ #endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */
#endif /* __KERNEL__ */ #endif /* __KERNEL__ */
#endif /* __ASM_POWERPC_PCI_H */
#endif /* __PPC64_PCI_H */
#ifndef _PPC64_PGALLOC_H #ifndef _ASM_POWERPC_PGALLOC_H
#define _PPC64_PGALLOC_H #define _ASM_POWERPC_PGALLOC_H
#ifndef CONFIG_PPC64
#include <asm-ppc/pgalloc.h>
#else
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/slab.h> #include <linux/slab.h>
...@@ -148,4 +152,5 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf); ...@@ -148,4 +152,5 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
#define check_pgt_cache() do { } while (0) #define check_pgt_cache() do { } while (0)
#endif /* _PPC64_PGALLOC_H */ #endif /* CONFIG_PPC64 */
#endif /* _ASM_POWERPC_PGALLOC_H */
#ifndef _PPC64_PGTABLE_H #ifndef _ASM_POWERPC_PGTABLE_H
#define _PPC64_PGTABLE_H #define _ASM_POWERPC_PGTABLE_H
#ifndef CONFIG_PPC64
#include <asm-ppc/pgtable.h>
#else
/* /*
* This file contains the functions and defines necessary to modify and use * This file contains the functions and defines necessary to modify and use
...@@ -46,6 +50,13 @@ struct mm_struct; ...@@ -46,6 +50,13 @@ struct mm_struct;
#define VMALLOC_SIZE (0x80000000000UL) #define VMALLOC_SIZE (0x80000000000UL)
#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
/*
* Define the address range of the imalloc VM area.
*/
#define PHBS_IO_BASE VMALLOC_END
#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
/* /*
* Common bits in a linux-style PTE. These match the bits in the * Common bits in a linux-style PTE. These match the bits in the
* (hardware-defined) PowerPC PTE as closely as possible. Additional * (hardware-defined) PowerPC PTE as closely as possible. Additional
...@@ -69,7 +80,7 @@ struct mm_struct; ...@@ -69,7 +80,7 @@ struct mm_struct;
#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY) #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
/* __pgprot defined in asm-ppc64/page.h */ /* __pgprot defined in asm-powerpc/page.h */
#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER) #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
...@@ -509,4 +520,5 @@ void pgtable_cache_init(void); ...@@ -509,4 +520,5 @@ void pgtable_cache_init(void);
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* _PPC64_PGTABLE_H */ #endif /* CONFIG_PPC64 */
#endif /* _ASM_POWERPC_PGTABLE_H */
...@@ -48,8 +48,6 @@ extern void pSeries_final_fixup(void); ...@@ -48,8 +48,6 @@ extern void pSeries_final_fixup(void);
extern void pSeries_irq_bus_setup(struct pci_bus *bus); extern void pSeries_irq_bus_setup(struct pci_bus *bus);
extern unsigned long pci_probe_only; extern unsigned long pci_probe_only;
extern unsigned long pci_assign_all_buses;
extern int pci_read_irq_line(struct pci_dev *pci_dev);
/* ---- EEH internal-use-only related routines ---- */ /* ---- EEH internal-use-only related routines ---- */
#ifdef CONFIG_EEH #ifdef CONFIG_EEH
......
...@@ -18,31 +18,41 @@ ...@@ -18,31 +18,41 @@
* *
* (the type definitions are in asm/spinlock_types.h) * (the type definitions are in asm/spinlock_types.h)
*/ */
#include <linux/config.h> #ifdef CONFIG_PPC64
#include <asm/paca.h> #include <asm/paca.h>
#include <asm/hvcall.h> #include <asm/hvcall.h>
#include <asm/iseries/hv_call.h> #include <asm/iseries/hv_call.h>
#endif
#include <asm/asm-compat.h>
#include <asm/synch.h>
#define __raw_spin_is_locked(x) ((x)->slock != 0) #define __raw_spin_is_locked(x) ((x)->slock != 0)
#ifdef CONFIG_PPC64
/* use 0x800000yy when locked, where yy == CPU number */
#define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
#else
#define LOCK_TOKEN 1
#endif
/* /*
* This returns the old value in the lock, so we succeeded * This returns the old value in the lock, so we succeeded
* in getting the lock if the return value is 0. * in getting the lock if the return value is 0.
*/ */
static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock) static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
{ {
unsigned long tmp, tmp2; unsigned long tmp, token;
token = LOCK_TOKEN;
__asm__ __volatile__( __asm__ __volatile__(
" lwz %1,%3(13) # __spin_trylock\n\ "1: lwarx %0,0,%2 # __spin_trylock\n\
1: lwarx %0,0,%2\n\
cmpwi 0,%0,0\n\ cmpwi 0,%0,0\n\
bne- 2f\n\ bne- 2f\n\
stwcx. %1,0,%2\n\ stwcx. %1,0,%2\n\
bne- 1b\n\ bne- 1b\n\
isync\n\ isync\n\
2:" : "=&r" (tmp), "=&r" (tmp2) 2:" : "=&r" (tmp)
: "r" (&lock->slock), "i" (offsetof(struct paca_struct, lock_token)) : "r" (token), "r" (&lock->slock)
: "cr0", "memory"); : "cr0", "memory");
return tmp; return tmp;
...@@ -113,11 +123,17 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long ...@@ -113,11 +123,17 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long
static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
{ {
__asm__ __volatile__("lwsync # __raw_spin_unlock": : :"memory"); __asm__ __volatile__(SYNC_ON_SMP" # __raw_spin_unlock"
: : :"memory");
lock->slock = 0; lock->slock = 0;
} }
#ifdef CONFIG_PPC64
extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
#else
#define __raw_spin_unlock_wait(lock) \
do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
#endif
/* /*
* Read-write spinlocks, allowing multiple readers * Read-write spinlocks, allowing multiple readers
...@@ -133,6 +149,14 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); ...@@ -133,6 +149,14 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
#define __raw_read_can_lock(rw) ((rw)->lock >= 0) #define __raw_read_can_lock(rw) ((rw)->lock >= 0)
#define __raw_write_can_lock(rw) (!(rw)->lock) #define __raw_write_can_lock(rw) (!(rw)->lock)
#ifdef CONFIG_PPC64
#define __DO_SIGN_EXTEND "extsw %0,%0\n"
#define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */
#else
#define __DO_SIGN_EXTEND
#define WRLOCK_TOKEN (-1)
#endif
/* /*
* This returns the old value in the lock + 1, * This returns the old value in the lock + 1,
* so we got a read lock if the return value is > 0. * so we got a read lock if the return value is > 0.
...@@ -142,11 +166,12 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw) ...@@ -142,11 +166,12 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
long tmp; long tmp;
__asm__ __volatile__( __asm__ __volatile__(
"1: lwarx %0,0,%1 # read_trylock\n\ "1: lwarx %0,0,%1 # read_trylock\n"
extsw %0,%0\n\ __DO_SIGN_EXTEND
addic. %0,%0,1\n\ " addic. %0,%0,1\n\
ble- 2f\n\ ble- 2f\n"
stwcx. %0,0,%1\n\ PPC405_ERR77(0,%1)
" stwcx. %0,0,%1\n\
bne- 1b\n\ bne- 1b\n\
isync\n\ isync\n\
2:" : "=&r" (tmp) 2:" : "=&r" (tmp)
...@@ -162,18 +187,19 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw) ...@@ -162,18 +187,19 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
*/ */
static __inline__ long __write_trylock(raw_rwlock_t *rw) static __inline__ long __write_trylock(raw_rwlock_t *rw)
{ {
long tmp, tmp2; long tmp, token;
token = WRLOCK_TOKEN;
__asm__ __volatile__( __asm__ __volatile__(
" lwz %1,%3(13) # write_trylock\n\ "1: lwarx %0,0,%2 # write_trylock\n\
1: lwarx %0,0,%2\n\
cmpwi 0,%0,0\n\ cmpwi 0,%0,0\n\
bne- 2f\n\ bne- 2f\n"
stwcx. %1,0,%2\n\ PPC405_ERR77(0,%1)
" stwcx. %1,0,%2\n\
bne- 1b\n\ bne- 1b\n\
isync\n\ isync\n\
2:" : "=&r" (tmp), "=&r" (tmp2) 2:" : "=&r" (tmp)
: "r" (&rw->lock), "i" (offsetof(struct paca_struct, lock_token)) : "r" (token), "r" (&rw->lock)
: "cr0", "memory"); : "cr0", "memory");
return tmp; return tmp;
...@@ -224,8 +250,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw) ...@@ -224,8 +250,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
__asm__ __volatile__( __asm__ __volatile__(
"eieio # read_unlock\n\ "eieio # read_unlock\n\
1: lwarx %0,0,%1\n\ 1: lwarx %0,0,%1\n\
addic %0,%0,-1\n\ addic %0,%0,-1\n"
stwcx. %0,0,%1\n\ PPC405_ERR77(0,%1)
" stwcx. %0,0,%1\n\
bne- 1b" bne- 1b"
: "=&r"(tmp) : "=&r"(tmp)
: "r"(&rw->lock) : "r"(&rw->lock)
...@@ -234,7 +261,8 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw) ...@@ -234,7 +261,8 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
static __inline__ void __raw_write_unlock(raw_rwlock_t *rw) static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
{ {
__asm__ __volatile__("lwsync # write_unlock": : :"memory"); __asm__ __volatile__(SYNC_ON_SMP" # write_unlock"
: : :"memory");
rw->lock = 0; rw->lock = 0;
} }
......
...@@ -545,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *); ...@@ -545,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
#include <asm/mpc8260_pci9.h> #include <asm/mpc8260_pci9.h>
#endif #endif
#ifdef CONFIG_NOT_COHERENT_CACHE
#define dma_cache_inv(_start,_size) \
invalidate_dcache_range(_start, (_start + _size))
#define dma_cache_wback(_start,_size) \
clean_dcache_range(_start, (_start + _size))
#define dma_cache_wback_inv(_start,_size) \
flush_dcache_range(_start, (_start + _size))
#else
#define dma_cache_inv(_start,_size) do { } while (0)
#define dma_cache_wback(_start,_size) do { } while (0)
#define dma_cache_wback_inv(_start,_size) do { } while (0)
#endif
/* /*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem * Convert a physical pointer to a virtual kernel pointer for /dev/mem
* access * access
......
/* Copyright (C) 2004 IBM
*
* Implements the generic device dma API for ppc64. Handles
* the pci and vio busses
*/
#ifndef _ASM_DMA_MAPPING_H
#define _ASM_DMA_MAPPING_H
#include <linux/types.h>
#include <linux/cache.h>
/* need struct page definitions */
#include <linux/mm.h>
#include <asm/scatterlist.h>
#include <asm/bug.h>
#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
extern int dma_supported(struct device *dev, u64 mask);
extern int dma_set_mask(struct device *dev, u64 dma_mask);
extern void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag);
extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
dma_addr_t dma_handle);
extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
size_t size, enum dma_data_direction direction);
extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
size_t size, enum dma_data_direction direction);
extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size,
enum dma_data_direction direction);
extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
size_t size, enum dma_data_direction direction);
extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction direction);
extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
int nhwentries, enum dma_data_direction direction);
static inline void
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
/* nothing to do */
}
static inline void
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
/* nothing to do */
}
static inline void
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
/* nothing to do */
}
static inline void
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
/* nothing to do */
}
static inline int dma_mapping_error(dma_addr_t dma_addr)
{
return (dma_addr == DMA_ERROR_CODE);
}
/* Now for the API extensions over the pci_ one */
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
#define dma_is_consistent(d) (1)
static inline int
dma_get_cache_alignment(void)
{
/* no easy way to get cache size on all processors, so return
* the maximum possible, to be safe */
return (1 << L1_CACHE_SHIFT_MAX);
}
static inline void
dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
/* nothing to do */
}
static inline void
dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
/* nothing to do */
}
static inline void
dma_cache_sync(void *vaddr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
/* nothing to do */
}
/*
* DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
*/
struct dma_mapping_ops {
void * (*alloc_coherent)(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag);
void (*free_coherent)(struct device *dev, size_t size,
void *vaddr, dma_addr_t dma_handle);
dma_addr_t (*map_single)(struct device *dev, void *ptr,
size_t size, enum dma_data_direction direction);
void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
size_t size, enum dma_data_direction direction);
int (*map_sg)(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction);
void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction);
int (*dma_supported)(struct device *dev, u64 mask);
int (*dac_dma_supported)(struct device *dev, u64 mask);
};
#endif /* _ASM_DMA_MAPPING_H */
#ifndef _PPC64_IMALLOC_H
#define _PPC64_IMALLOC_H
/*
* Define the address range of the imalloc VM area.
*/
#define PHBS_IO_BASE VMALLOC_END
#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
/* imalloc region types */
#define IM_REGION_UNUSED 0x1
#define IM_REGION_SUBSET 0x2
#define IM_REGION_EXISTS 0x4
#define IM_REGION_OVERLAP 0x8
#define IM_REGION_SUPERSET 0x10
extern struct vm_struct * im_get_free_area(unsigned long size);
extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
int region_type);
extern void im_free(void *addr);
extern unsigned long ioremap_bot;
#endif /* _PPC64_IMALLOC_H */
...@@ -80,10 +80,12 @@ ...@@ -80,10 +80,12 @@
/* /*
* Define standard taskfile in/out register * Define standard taskfile in/out register
*/ */
#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE
#define IDE_TASKFILE_STD_IN_FLAGS 0xFE #define IDE_TASKFILE_STD_IN_FLAGS 0xFE
#define IDE_HOB_STD_OUT_FLAGS 0x3C
#define IDE_HOB_STD_IN_FLAGS 0x3C #define IDE_HOB_STD_IN_FLAGS 0x3C
#ifndef __KERNEL__
#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE
#define IDE_HOB_STD_OUT_FLAGS 0x3C
#endif
typedef unsigned char task_ioreg_t; typedef unsigned char task_ioreg_t;
typedef unsigned long sata_ioreg_t; typedef unsigned long sata_ioreg_t;
......
...@@ -1201,37 +1201,11 @@ extern u64 ide_get_error_location(ide_drive_t *, char *); ...@@ -1201,37 +1201,11 @@ extern u64 ide_get_error_location(ide_drive_t *, char *);
*/ */
typedef enum { typedef enum {
ide_wait, /* insert rq at end of list, and wait for it */ ide_wait, /* insert rq at end of list, and wait for it */
ide_next, /* insert rq immediately after current request */
ide_preempt, /* insert rq in front of current request */ ide_preempt, /* insert rq in front of current request */
ide_head_wait, /* insert rq in front of current request and wait for it */ ide_head_wait, /* insert rq in front of current request and wait for it */
ide_end /* insert rq at end of list, but don't wait for it */ ide_end /* insert rq at end of list, but don't wait for it */
} ide_action_t; } ide_action_t;
/*
* This function issues a special IDE device request
* onto the request queue.
*
* If action is ide_wait, then the rq is queued at the end of the
* request queue, and the function sleeps until it has been processed.
* This is for use when invoked from an ioctl handler.
*
* If action is ide_preempt, then the rq is queued at the head of
* the request queue, displacing the currently-being-processed
* request and this function returns immediately without waiting
* for the new rq to be completed. This is VERY DANGEROUS, and is
* intended for careful use by the ATAPI tape/cdrom driver code.
*
* If action is ide_next, then the rq is queued immediately after
* the currently-being-processed-request (if any), and the function
* returns without waiting for the new rq to be completed. As above,
* This is VERY DANGEROUS, and is intended for careful use by the
* ATAPI tape/cdrom driver code.
*
* If action is ide_end, then the rq is queued at the end of the
* request queue, and the function returns immediately without waiting
* for the new rq to be completed. This is again intended for careful
* use by the ATAPI tape/cdrom driver code.
*/
extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
/* /*
......
...@@ -620,6 +620,7 @@ ...@@ -620,6 +620,7 @@
#define PCI_DEVICE_ID_SI_961 0x0961 #define PCI_DEVICE_ID_SI_961 0x0961
#define PCI_DEVICE_ID_SI_962 0x0962 #define PCI_DEVICE_ID_SI_962 0x0962
#define PCI_DEVICE_ID_SI_963 0x0963 #define PCI_DEVICE_ID_SI_963 0x0963
#define PCI_DEVICE_ID_SI_965 0x0965
#define PCI_DEVICE_ID_SI_5511 0x5511 #define PCI_DEVICE_ID_SI_5511 0x5511
#define PCI_DEVICE_ID_SI_5513 0x5513 #define PCI_DEVICE_ID_SI_5513 0x5513
#define PCI_DEVICE_ID_SI_5518 0x5518 #define PCI_DEVICE_ID_SI_5518 0x5518
...@@ -1234,6 +1235,7 @@ ...@@ -1234,6 +1235,7 @@
#define PCI_DEVICE_ID_VIA_8703_51_0 0x3148 #define PCI_DEVICE_ID_VIA_8703_51_0 0x3148
#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149 #define PCI_DEVICE_ID_VIA_8237_SATA 0x3149
#define PCI_DEVICE_ID_VIA_XN266 0x3156 #define PCI_DEVICE_ID_VIA_XN266 0x3156
#define PCI_DEVICE_ID_VIA_6410 0x3164
#define PCI_DEVICE_ID_VIA_8754C_0 0x3168 #define PCI_DEVICE_ID_VIA_8754C_0 0x3168
#define PCI_DEVICE_ID_VIA_8235 0x3177 #define PCI_DEVICE_ID_VIA_8235 0x3177
#define PCI_DEVICE_ID_VIA_8385_0 0x3188 #define PCI_DEVICE_ID_VIA_8385_0 0x3188
......
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