Commit 5045388c authored by Eliad Peller's avatar Eliad Peller Committed by Emmanuel Grumbach

iwlwifi: pcie: clean iwl_pcie_[rt]xq_inc_wr_ptr a bit

The various code blocks in iwl_pcie_[rt]xq_inc_wr_ptr
finally do the same things, so just merge them
all and make the functions cleaner.
Signed-off-by: default avatarEliad Peller <eliadx.peller@intel.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
parent e57f1734
...@@ -155,37 +155,26 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans, ...@@ -155,37 +155,26 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
if (rxq->need_update == 0) if (rxq->need_update == 0)
goto exit_unlock; goto exit_unlock;
if (trans->cfg->base_params->shadow_reg_enable) { /*
/* shadow register enabled */ * explicitly wake up the NIC if:
/* Device expects a multiple of 8 */ * 1. shadow registers aren't enabled
rxq->write_actual = (rxq->write & ~0x7); * 2. there is a chance that the NIC is asleep
iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual); */
} else { if (!trans->cfg->base_params->shadow_reg_enable &&
/* If power-saving is in use, make sure device is awake */ test_bit(STATUS_TPOWER_PMI, &trans->status)) {
if (test_bit(STATUS_TPOWER_PMI, &trans->status)) {
reg = iwl_read32(trans, CSR_UCODE_DRV_GP1); reg = iwl_read32(trans, CSR_UCODE_DRV_GP1);
if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
IWL_DEBUG_INFO(trans, IWL_DEBUG_INFO(trans, "Rx queue requesting wakeup, GP1 = 0x%x\n",
"Rx queue requesting wakeup," reg);
" GP1 = 0x%x\n", reg);
iwl_set_bit(trans, CSR_GP_CNTRL, iwl_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
goto exit_unlock; goto exit_unlock;
} }
rxq->write_actual = (rxq->write & ~0x7);
iwl_write_direct32(trans, FH_RSCSR_CHNL0_WPTR,
rxq->write_actual);
/* Else device is assumed to be awake */
} else {
/* Device expects a multiple of 8 */
rxq->write_actual = (rxq->write & ~0x7);
iwl_write_direct32(trans, FH_RSCSR_CHNL0_WPTR,
rxq->write_actual);
}
} }
rxq->write_actual = round_down(rxq->write, 8);
iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual);
rxq->need_update = 0; rxq->need_update = 0;
exit_unlock: exit_unlock:
......
...@@ -296,43 +296,38 @@ void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq) ...@@ -296,43 +296,38 @@ void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq)
if (txq->need_update == 0) if (txq->need_update == 0)
return; return;
if (trans->cfg->base_params->shadow_reg_enable || /*
txq_id == trans_pcie->cmd_queue) { * explicitly wake up the NIC if:
/* shadow register enabled */ * 1. shadow registers aren't enabled
iwl_write32(trans, HBUS_TARG_WRPTR, * 2. NIC is woken up for CMD regardless of shadow outside this function
txq->q.write_ptr | (txq_id << 8)); * 3. there is a chance that the NIC is asleep
} else { */
/* if we're trying to save power */ if (!trans->cfg->base_params->shadow_reg_enable &&
if (test_bit(STATUS_TPOWER_PMI, &trans->status)) { txq_id != trans_pcie->cmd_queue &&
/* wake up nic if it's powered down ... test_bit(STATUS_TPOWER_PMI, &trans->status)) {
/*
* wake up nic if it's powered down ...
* uCode will wake up, and interrupt us again, so next * uCode will wake up, and interrupt us again, so next
* time we'll skip this part. */ * time we'll skip this part.
*/
reg = iwl_read32(trans, CSR_UCODE_DRV_GP1); reg = iwl_read32(trans, CSR_UCODE_DRV_GP1);
if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
IWL_DEBUG_INFO(trans, IWL_DEBUG_INFO(trans, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
"Tx queue %d requesting wakeup," txq_id, reg);
" GP1 = 0x%x\n", txq_id, reg);
iwl_set_bit(trans, CSR_GP_CNTRL, iwl_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
return; return;
} }
}
IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id,
txq->q.write_ptr);
iwl_write_direct32(trans, HBUS_TARG_WRPTR,
txq->q.write_ptr | (txq_id << 8));
/* /*
* else not in power-save mode, * if not in power-save mode, uCode will never sleep when we're
* uCode will never sleep when we're
* trying to tx (during RFKILL, we're not trying to tx). * trying to tx (during RFKILL, we're not trying to tx).
*/ */
} else IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id, txq->q.write_ptr);
iwl_write32(trans, HBUS_TARG_WRPTR, iwl_write32(trans, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
txq->q.write_ptr | (txq_id << 8));
}
txq->need_update = 0; txq->need_update = 0;
} }
......
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