arm64: dts: uniphier: update to new Denali NAND binding

With commit d8e8fd0e ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts

@@ -163,4 +163,8 @@ ethphy: ethphy@1 {
 
 &nand {
 	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+	};
 };

arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

@@ -617,6 +617,8 @@ nand: nand@68000000 {
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
 			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			interrupts = <0 65 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_nand>;

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

@@ -921,6 +921,8 @@ nand: nand@68000000 {
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
 			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			interrupts = <0 65 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_nand>;

arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts

@@ -115,4 +115,8 @@ &pcie {
 
 &nand {
 	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+	};
 };

arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi

@@ -779,6 +779,8 @@ nand: nand@68000000 {
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
 			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			interrupts = <0 65 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_nand>;