Commit 550c58e0 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher

drm/amdgpu: add common support for dimgrey_cavefish

Add external id and set clock gating for dimgrey_cavefish.
Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarJiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f2a6c81d
...@@ -891,6 +891,11 @@ static int nv_common_early_init(void *handle) ...@@ -891,6 +891,11 @@ static int nv_common_early_init(void *handle)
adev->pg_flags = AMD_PG_SUPPORT_GFX_PG; adev->pg_flags = AMD_PG_SUPPORT_GFX_PG;
adev->external_rev_id = adev->rev_id + 0x01; adev->external_rev_id = adev->rev_id + 0x01;
break; break;
case CHIP_DIMGREY_CAVEFISH:
adev->cg_flags = 0;
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x3c;
break;
default: default:
/* FIXME: not supported yet */ /* FIXME: not supported yet */
return -EINVAL; return -EINVAL;
...@@ -1118,6 +1123,7 @@ static int nv_common_set_clockgating_state(void *handle, ...@@ -1118,6 +1123,7 @@ static int nv_common_set_clockgating_state(void *handle,
case CHIP_NAVI12: case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID: case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER: case CHIP_NAVY_FLOUNDER:
case CHIP_DIMGREY_CAVEFISH:
adev->nbio.funcs->update_medium_grain_clock_gating(adev, adev->nbio.funcs->update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE); state == AMD_CG_STATE_GATE);
adev->nbio.funcs->update_medium_grain_light_sleep(adev, adev->nbio.funcs->update_medium_grain_light_sleep(adev,
......
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