Commit 579df428 authored by Michael Walle's avatar Michael Walle Committed by Shawn Guo

arm64: dts: imx8mn-evk: add QSPI flash

There is a 32MiB Micron MT25QU256ABA1 serial NOR flash on the EVK board.
Add a device tree node for it.

Tested on a 8MNANOD3L-EVK.
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Tested-by: default avatarHeiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9694ed9b
...@@ -110,6 +110,22 @@ vddio: vddio-regulator { ...@@ -110,6 +110,22 @@ vddio: vddio-regulator {
}; };
}; };
&flexspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexspi>;
status = "okay";
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <166000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&i2c1 { &i2c1 {
clock-frequency = <400000>; clock-frequency = <400000>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -267,6 +283,17 @@ MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 ...@@ -267,6 +283,17 @@ MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
>; >;
}; };
pinctrl_flexspi: flexspigrp {
fsl,pins = <
MX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
MX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
MX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
MX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
MX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
MX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
>;
};
pinctrl_gpio_led: gpioledgrp { pinctrl_gpio_led: gpioledgrp {
fsl,pins = < fsl,pins = <
MX8MN_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 MX8MN_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
......
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