Commit 5c101474 authored by Aric Cyr's avatar Aric Cyr Committed by Alex Deucher

drm/amd/display: Promote DAL to 3.2.259

Summary:

- Enable DCN35 physymclk root clock gating
- Fix DP automation test pattern bug
- Disable OTG for mode timing switch on DCN35
- Refactor DML2
- Revert Fix handling duplicate planes on one stream
- Revert Enable DCN clock gating
- Implement cursor P-State allow for SubVP
- Optimize pipe otg allocation
- Save and restore mall state while switching from ODM to Subvp
Acked-by: default avatarHersen Wu <hersenxs.wu@amd.com>
Signed-off-by: default avatarAric Cyr <aric.cyr@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fecbaa0a
...@@ -49,7 +49,7 @@ struct aux_payload; ...@@ -49,7 +49,7 @@ struct aux_payload;
struct set_config_cmd_payload; struct set_config_cmd_payload;
struct dmub_notification; struct dmub_notification;
#define DC_VER "3.2.258" #define DC_VER "3.2.259"
#define MAX_SURFACES 3 #define MAX_SURFACES 3
#define MAX_PLANES 6 #define MAX_PLANES 6
......
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