Commit 60c22e3f authored by Darren Williams's avatar Darren Williams Committed by David Mosberger

ia64: define pending_irq_cpumask in irq.c

This fixes a build-problem with the Ski simulator.  The simulator doesn't
include iosapic.c and hence pending_irq_cpumask never got defined.
parent 287e7692
...@@ -100,7 +100,7 @@ ...@@ -100,7 +100,7 @@
#endif #endif
static spinlock_t iosapic_lock = SPIN_LOCK_UNLOCKED; static spinlock_t iosapic_lock = SPIN_LOCK_UNLOCKED;
cpumask_t __cacheline_aligned pending_irq_cpumask[NR_IRQS]; extern cpumask_t __cacheline_aligned pending_irq_cpumask[NR_IRQS];
/* These tables map IA-64 vectors to the IOSAPIC pin that generates this vector. */ /* These tables map IA-64 vectors to the IOSAPIC pin that generates this vector. */
......
...@@ -56,7 +56,6 @@ ...@@ -56,7 +56,6 @@
#include <asm/delay.h> #include <asm/delay.h>
#include <asm/irq.h> #include <asm/irq.h>
extern cpumask_t __cacheline_aligned pending_irq_cpumask[NR_IRQS];
/* /*
* Linux has a controller-independent x86 interrupt architecture. * Linux has a controller-independent x86 interrupt architecture.
...@@ -85,6 +84,11 @@ irq_desc_t _irq_desc[NR_IRQS] __cacheline_aligned = { ...@@ -85,6 +84,11 @@ irq_desc_t _irq_desc[NR_IRQS] __cacheline_aligned = {
} }
}; };
/*
* This is updated when the user sets irq affinity via /proc
*/
cpumask_t __cacheline_aligned pending_irq_cpumask[NR_IRQS];
#ifdef CONFIG_IA64_GENERIC #ifdef CONFIG_IA64_GENERIC
irq_desc_t * __ia64_irq_desc (unsigned int irq) irq_desc_t * __ia64_irq_desc (unsigned int irq)
{ {
......
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