Commit 62a7fc32 authored by Andreas Färber's avatar Andreas Färber Committed by Mark Brown

ASoC: max98088: Add master clock handling

If master clock is provided through device tree, then update
the master clock frequency during set_sysclk.

Cc: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
Acked-by: default avatarTushar Behera <trblinux@gmail.com>
Reviewed-by: default avatarJavier Martinez Canillas <javier.martinez@collabora.co.uk>
[m.felsch@pengutronix.de: move mclk request to i2c_probe]
[m.felsch@pengutronix.de: make use of snd_soc_component_get_bias_level()]
Signed-off-by: default avatarMarco Felsch <m.felsch@pengutronix.de>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent d6ed11ed
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <linux/pm.h> #include <linux/pm.h>
#include <linux/i2c.h> #include <linux/i2c.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/clk.h>
#include <sound/core.h> #include <sound/core.h>
#include <sound/pcm.h> #include <sound/pcm.h>
#include <sound/pcm_params.h> #include <sound/pcm_params.h>
...@@ -42,6 +43,7 @@ struct max98088_priv { ...@@ -42,6 +43,7 @@ struct max98088_priv {
struct regmap *regmap; struct regmap *regmap;
enum max98088_type devtype; enum max98088_type devtype;
struct max98088_pdata *pdata; struct max98088_pdata *pdata;
struct clk *mclk;
unsigned int sysclk; unsigned int sysclk;
struct max98088_cdata dai[2]; struct max98088_cdata dai[2];
int eq_textcnt; int eq_textcnt;
...@@ -1103,6 +1105,11 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, ...@@ -1103,6 +1105,11 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai,
if (freq == max98088->sysclk) if (freq == max98088->sysclk)
return 0; return 0;
if (!IS_ERR(max98088->mclk)) {
freq = clk_round_rate(max98088->mclk, freq);
clk_set_rate(max98088->mclk, freq);
}
/* Setup clocks for slave mode, and using the PLL /* Setup clocks for slave mode, and using the PLL
* PSCLK = 0x01 (when master clk is 10MHz to 20MHz) * PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
* 0x02 (when master clk is 20MHz to 30MHz).. * 0x02 (when master clk is 20MHz to 30MHz)..
...@@ -1310,6 +1317,20 @@ static int max98088_set_bias_level(struct snd_soc_component *component, ...@@ -1310,6 +1317,20 @@ static int max98088_set_bias_level(struct snd_soc_component *component,
break; break;
case SND_SOC_BIAS_PREPARE: case SND_SOC_BIAS_PREPARE:
/*
* SND_SOC_BIAS_PREPARE is called while preparing for a
* transition to ON or away from ON. If current bias_level
* is SND_SOC_BIAS_ON, then it is preparing for a transition
* away from ON. Disable the clock in that case, otherwise
* enable it.
*/
if (!IS_ERR(max98088->mclk)) {
if (snd_soc_component_get_bias_level(component) ==
SND_SOC_BIAS_ON)
clk_disable_unprepare(max98088->mclk);
else
clk_prepare_enable(max98088->mclk);
}
break; break;
case SND_SOC_BIAS_STANDBY: case SND_SOC_BIAS_STANDBY:
...@@ -1725,6 +1746,11 @@ static int max98088_i2c_probe(struct i2c_client *i2c, ...@@ -1725,6 +1746,11 @@ static int max98088_i2c_probe(struct i2c_client *i2c,
if (IS_ERR(max98088->regmap)) if (IS_ERR(max98088->regmap))
return PTR_ERR(max98088->regmap); return PTR_ERR(max98088->regmap);
max98088->mclk = devm_clk_get(&i2c->dev, "mclk");
if (IS_ERR(max98088->mclk))
if (PTR_ERR(max98088->mclk) == -EPROBE_DEFER)
return PTR_ERR(max98088->mclk);
max98088->devtype = id->driver_data; max98088->devtype = id->driver_data;
i2c_set_clientdata(i2c, max98088); i2c_set_clientdata(i2c, max98088);
......
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