Commit 62c455ca authored by Zhou Wang's avatar Zhou Wang Committed by Herbert Xu

crypto: hisilicon - add HiSilicon ZIP accelerator support

The HiSilicon ZIP accelerator implements the zlib and gzip algorithm. It
uses Hisilicon QM as the interface to the CPU.

This patch provides PCIe driver to the accelerator and registers it to
crypto acomp interface. It also uses sgl as data input/output interface.
Signed-off-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: default avatarShiju Jose <shiju.jose@huawei.com>
Signed-off-by: default avatarKenneth Lee <liguozhu@hisilicon.com>
Signed-off-by: default avatarHao Fang <fanghao11@huawei.com>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: default avatarJohn Garry <john.garry@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent dfed0098
...@@ -27,3 +27,11 @@ config CRYPTO_HISI_SGL ...@@ -27,3 +27,11 @@ config CRYPTO_HISI_SGL
HiSilicon accelerator engines use a common hardware scatterlist HiSilicon accelerator engines use a common hardware scatterlist
interface for data format. Specific engine driver may use this interface for data format. Specific engine driver may use this
module. module.
config CRYPTO_DEV_HISI_ZIP
tristate "Support for HiSilicon ZIP accelerator"
select CRYPTO_DEV_HISI_QM
select CRYPTO_HISI_SGL
select SG_SPLIT
help
Support for HiSilicon ZIP Driver
...@@ -2,3 +2,4 @@ ...@@ -2,3 +2,4 @@
obj-$(CONFIG_CRYPTO_DEV_HISI_SEC) += sec/ obj-$(CONFIG_CRYPTO_DEV_HISI_SEC) += sec/
obj-$(CONFIG_CRYPTO_DEV_HISI_QM) += qm.o obj-$(CONFIG_CRYPTO_DEV_HISI_QM) += qm.o
obj-$(CONFIG_CRYPTO_HISI_SGL) += sgl.o obj-$(CONFIG_CRYPTO_HISI_SGL) += sgl.o
obj-$(CONFIG_CRYPTO_DEV_HISI_ZIP) += zip/
obj-$(CONFIG_CRYPTO_DEV_HISI_ZIP) += hisi_zip.o
hisi_zip-objs = zip_main.o zip_crypto.o
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2019 HiSilicon Limited. */
#ifndef HISI_ZIP_H
#define HISI_ZIP_H
#undef pr_fmt
#define pr_fmt(fmt) "hisi_zip: " fmt
#include <linux/list.h>
#include "../qm.h"
#include "../sgl.h"
/* hisi_zip_sqe dw3 */
#define HZIP_BD_STATUS_M GENMASK(7, 0)
/* hisi_zip_sqe dw9 */
#define HZIP_REQ_TYPE_M GENMASK(7, 0)
#define HZIP_ALG_TYPE_ZLIB 0x02
#define HZIP_ALG_TYPE_GZIP 0x03
#define HZIP_BUF_TYPE_M GENMASK(11, 8)
#define HZIP_PBUFFER 0x0
#define HZIP_SGL 0x1
enum hisi_zip_error_type {
/* negative compression */
HZIP_NC_ERR = 0x0d,
};
struct hisi_zip_ctrl;
struct hisi_zip {
struct hisi_qm qm;
struct list_head list;
struct hisi_zip_ctrl *ctrl;
};
struct hisi_zip_sqe {
u32 consumed;
u32 produced;
u32 comp_data_length;
u32 dw3;
u32 input_data_length;
u32 lba_l;
u32 lba_h;
u32 dw7;
u32 dw8;
u32 dw9;
u32 dw10;
u32 priv_info;
u32 dw12;
u32 tag;
u32 dest_avail_out;
u32 rsvd0;
u32 comp_head_addr_l;
u32 comp_head_addr_h;
u32 source_addr_l;
u32 source_addr_h;
u32 dest_addr_l;
u32 dest_addr_h;
u32 stream_ctx_addr_l;
u32 stream_ctx_addr_h;
u32 cipher_key1_addr_l;
u32 cipher_key1_addr_h;
u32 cipher_key2_addr_l;
u32 cipher_key2_addr_h;
u32 rsvd1[4];
};
struct hisi_zip *find_zip_device(int node);
int hisi_zip_register_to_crypto(void);
void hisi_zip_unregister_from_crypto(void);
#endif
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