Commit 634557be authored by Tsuchiya Yuto's avatar Tsuchiya Yuto Committed by Mauro Carvalho Chehab

media: atomisp: add Microsoft Surface 3 ACPI vars

Microsoft Surface 3 does not describe CsiPort/CsiLanes in DSDT [1] or
EFI, or at least not desctibed in the forms the current atomisp driver
expects. This results in the default values (port: 0 lanes: 1) to be
used, which does not work.

So, define them ourselves in the driver.

The user-facing camera is AR0330 (2-lane) and the world-facing camera
is OV8835 (4-lane).

According to the portconfigs definition in atomisp_csi_lane_config()
[atomisp_v4l2.c]:

	} portconfigs[] = {
		/* Tangier/Merrifield available lane configurations */
		{ 0x00, { 4, 1, 0 } },		/* 00000 */
		{ 0x01, { 3, 1, 0 } },		/* 00001 */
		{ 0x02, { 2, 1, 0 } },		/* 00010 */
		{ 0x03, { 1, 1, 0 } },		/* 00011 */
		{ 0x04, { 2, 1, 2 } },		/* 00100 */
		{ 0x08, { 3, 1, 1 } },		/* 01000 */
		{ 0x09, { 2, 1, 1 } },		/* 01001 */
		{ 0x0a, { 1, 1, 1 } },		/* 01010 */

		/* Anniedale/Moorefield only configurations */
		{ 0x10, { 4, 2, 0 } },		/* 10000 */
		{ 0x11, { 3, 2, 0 } },		/* 10001 */
		{ 0x12, { 2, 2, 0 } },		/* 10010 */
		{ 0x13, { 1, 2, 0 } },		/* 10011 */
		{ 0x14, { 2, 2, 2 } },		/* 10100 */
		{ 0x18, { 3, 2, 1 } },		/* 11000 */
		{ 0x19, { 2, 2, 1 } },		/* 11001 */
		{ 0x1a, { 1, 2, 1 } },		/* 11010 */
	};

4-lane camera is always connected to the PRIMARY (port1) port [2]. In
this case, 2-lane camera can be connected to the only SECONDARY (port0)
port.

So, add these data accordingly as the gmin_cfg_var ACPI variables for
Surface 3.

[1] https://github.com/linux-surface/acpidumps/blob/7da48a392b4085c2021952290def1fc28505a643/surface_3/dsdt.dsl#L5879-L6278

[2] Yes, the PRIMARY port is port1 according to atomisp_camera_port
    [atomisp.h]:

	enum atomisp_camera_port {
		ATOMISP_CAMERA_PORT_SECONDARY,
		ATOMISP_CAMERA_PORT_PRIMARY,
		ATOMISP_CAMERA_PORT_TERTIARY,
		ATOMISP_CAMERA_NR_PORTS
	};
Signed-off-by: default avatarTsuchiya Yuto <kitakar@gmail.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent bb4924c2
...@@ -321,6 +321,18 @@ static struct gmin_cfg_var i8880_vars[] = { ...@@ -321,6 +321,18 @@ static struct gmin_cfg_var i8880_vars[] = {
{}, {},
}; };
/*
* Surface 3 does not describe CsiPort/CsiLanes in both DSDT and EFI.
*/
static struct gmin_cfg_var surface3_vars[] = {
{"APTA0330:00_CsiPort", "0"},
{"APTA0330:00_CsiLanes", "2"},
{"OVTI8835:00_CsiPort", "1"},
{"OVTI8835:00_CsiLanes", "4"},
{},
};
static const struct dmi_system_id gmin_vars[] = { static const struct dmi_system_id gmin_vars[] = {
{ {
.ident = "BYT-T FFD8", .ident = "BYT-T FFD8",
...@@ -358,6 +370,13 @@ static const struct dmi_system_id gmin_vars[] = { ...@@ -358,6 +370,13 @@ static const struct dmi_system_id gmin_vars[] = {
}, },
.driver_data = i8880_vars, .driver_data = i8880_vars,
}, },
{
.ident = "Surface 3",
.matches = {
DMI_MATCH(DMI_BOARD_NAME, "Surface 3"),
},
.driver_data = surface3_vars,
},
{} {}
}; };
......
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