net: mvpp2: do not set GMAC autoneg when using XLG MAC

When using the XLG MAC, it does not make sense to force the GMAC autoneg
parameters. This patch adds checks to only set the GMAC autoneg
parameters when needed (i.e. when not using the XLG MAC).
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

drivers/net/ethernet/marvell/mvpp2.c

@@ -5735,17 +5735,17 @@ static irqreturn_t mvpp2_isr(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-/* Adjust link */
-static void mvpp2_link_event(struct net_device *dev)
+static void mvpp2_gmac_set_autoneg(struct mvpp2_port *port,
+				   struct phy_device *phydev)
 {
-	struct mvpp2_port *port = netdev_priv(dev);
-	struct phy_device *phydev = dev->phydev;
 	u32 val;
 
-	if (phydev->link) {
-		if ((port->speed != phydev->speed) ||
-		    (port->duplex != phydev->duplex)) {
-			u32 val;
+	if (port->phy_interface != PHY_INTERFACE_MODE_RGMII &&
+	    port->phy_interface != PHY_INTERFACE_MODE_RGMII_ID &&
+	    port->phy_interface != PHY_INTERFACE_MODE_RGMII_RXID &&
+	    port->phy_interface != PHY_INTERFACE_MODE_RGMII_TXID &&
+	    port->phy_interface != PHY_INTERFACE_MODE_SGMII)
+		return;
 
 	val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
 	val &= ~(MVPP2_GMAC_CONFIG_MII_SPEED |
@@ -5764,6 +5764,20 @@ static void mvpp2_link_event(struct net_device *dev)
 
 	writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
 
+}
+
+/* Adjust link */
+static void mvpp2_link_event(struct net_device *dev)
+{
+	struct mvpp2_port *port = netdev_priv(dev);
+	struct phy_device *phydev = dev->phydev;
+	u32 val;
+
+	if (phydev->link) {
+		if ((port->speed != phydev->speed) ||
+		    (port->duplex != phydev->duplex)) {
+			mvpp2_gmac_set_autoneg(port, phydev);
+
 			port->duplex = phydev->duplex;
 			port->speed  = phydev->speed;
 		}
@@ -5773,10 +5787,16 @@ static void mvpp2_link_event(struct net_device *dev)
 		port->link = phydev->link;
 
 		if (phydev->link) {
+			if (port->phy_interface == PHY_INTERFACE_MODE_RGMII ||
+			    port->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
+			    port->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID ||
+			    port->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID ||
+			    port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
 				val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
 				val |= (MVPP2_GMAC_FORCE_LINK_PASS |
 					MVPP2_GMAC_FORCE_LINK_DOWN);
 				writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
+			}
 
 			mvpp2_interrupts_enable(port);
 			mvpp2_port_enable(port);