Commit 6cd6cede authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown

ASoC: tlv320dac33: BCLK divider fix

The BCLK divider was not configured in case of mode7.
This leads to unpredictable behavior when switching between FIFO modes.
Configure the BCLK divider depending on the fifo_mode (FIFO is in use,
or FIFO bypass).
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 84740ac1
......@@ -845,11 +845,14 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
switch (dac33->fifo_mode) {
case DAC33_FIFO_MODE1:
/* 20: BCLK divide ratio */
/* BCLK divide ratio */
if (dac33->fifo_mode)
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 3);
else
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
switch (dac33->fifo_mode) {
case DAC33_FIFO_MODE1:
dac33_write16(codec, DAC33_ATHR_MSB,
DAC33_THRREG(dac33->alarm_threshold));
break;
......@@ -864,8 +867,6 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
DAC33_THRREG(10));
break;
default:
/* BYPASS mode */
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
break;
}
......
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