Commit 6f135430 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski

ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250

Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner.  This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Tested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
parent 55125ae9
...@@ -236,25 +236,14 @@ clock_audss: audss-clock-controller@3810000 { ...@@ -236,25 +236,14 @@ clock_audss: audss-clock-controller@3810000 {
timer@101c0000 { timer@101c0000 {
compatible = "samsung,exynos4210-mct"; compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>; reg = <0x101C0000 0x800>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
<4 0>, <5 0>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct"; clock-names = "fin_pll", "mct";
interrupts-extended = <&combiner 23 3>,
mct_map: mct-map { <&combiner 23 4>,
#interrupt-cells = <2>; <&combiner 25 2>,
#address-cells = <0>; <&combiner 25 3>,
#size-cells = <0>; <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
interrupt-map = <0x0 0 &combiner 23 3>, <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
<0x1 0 &combiner 23 4>,
<0x2 0 &combiner 25 2>,
<0x3 0 &combiner 25 3>,
<0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
<0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
};
}; };
pinctrl_0: pinctrl@11400000 { pinctrl_0: pinctrl@11400000 {
......
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