Commit 6f38fffe authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Jakub Kicinski

net: mtk_eth_soc: move PHY power up

The PHY power up is common to both configuration paths, so move it into
the parent function. We need to do this for all serdes modes.
Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 12198c3a
...@@ -45,9 +45,6 @@ static void mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs) ...@@ -45,9 +45,6 @@ static void mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs)
regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1, regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1,
SGMII_AN_RESTART, SGMII_AN_RESTART); SGMII_AN_RESTART, SGMII_AN_RESTART);
regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
SGMII_PHYA_PWD, 0);
} }
/* For 1000BASE-X and 2500BASE-X interface modes, which operate at a /* For 1000BASE-X and 2500BASE-X interface modes, which operate at a
...@@ -72,10 +69,6 @@ static void mtk_pcs_setup_mode_force(struct mtk_pcs *mpcs, ...@@ -72,10 +69,6 @@ static void mtk_pcs_setup_mode_force(struct mtk_pcs *mpcs,
regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE, regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE,
SGMII_IF_MODE_MASK & ~SGMII_DUPLEX_FULL, SGMII_IF_MODE_MASK & ~SGMII_DUPLEX_FULL,
SGMII_SPEED_1000); SGMII_SPEED_1000);
/* Release PHYA power down state */
regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
SGMII_PHYA_PWD, 0);
} }
static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode, static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
...@@ -91,6 +84,10 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode, ...@@ -91,6 +84,10 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
else if (phylink_autoneg_inband(mode)) else if (phylink_autoneg_inband(mode))
mtk_pcs_setup_mode_an(mpcs); mtk_pcs_setup_mode_an(mpcs);
/* Release PHYA power down state */
regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
SGMII_PHYA_PWD, 0);
return 0; return 0;
} }
......
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