Commit 71b59439 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Sipmplify PLANE_STRIDE masking

There's no need to have separate masks for the stride bitfield
in PLANE_STRIDE for different platforms. All the extra bits
are hardcoded to zero anyway.

Also the masks we're using now don't even match the actual hardware
since the bitfield was only 10 bits on skl/derivatives, only getting
bumped to 11 bits on glk.

So let's just use a 12 bit mask for everything.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-5-ville.syrjala@linux.intel.comReviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent b0641cb8
......@@ -2374,10 +2374,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
if (DISPLAY_VER(dev_priv) >= 13)
fb->pitches[0] = (val & PLANE_STRIDE_MASK_XELPD) * stride_mult;
else
fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
aligned_height = intel_fb_align_height(fb, 0, fb->height);
......
......@@ -6435,8 +6435,7 @@ enum {
_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
#define PLANE_STRIDE(pipe, plane) \
_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
#define PLANE_STRIDE_MASK REG_GENMASK(10, 0)
#define PLANE_STRIDE_MASK_XELPD REG_GENMASK(11, 0)
#define PLANE_STRIDE_MASK REG_GENMASK(11, 0)
#define _PLANE_POS_1_B 0x7118c
#define _PLANE_POS_2_B 0x7128c
......
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