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Commit 7218dae7 authored by Paul Zimmerman's avatar Paul Zimmerman Committed by Greg Kroah-Hartman
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staging: dwc2: make all the dwc2_set_param* functions void 

We were not checking the return value from any of these functions,
so make them void functions
Signed-off-by: default avatarPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 498f0669
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Showing with 85 additions and 172 deletions
drivers/staging/dwc2/core.c
View file @ 7218dae7
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drivers/staging/dwc2/core.h
View file @ 7218dae7
...@@ -571,7 +571,7 @@ extern irqreturn_t dwc2_handle_common_intr(int irq, void *dev); ...@@ -571,7 +571,7 @@ extern irqreturn_t dwc2_handle_common_intr(int irq, void *dev);
* 1 - SRP Only capable * 1 - SRP Only capable
* 2 - No HNP/SRP capable * 2 - No HNP/SRP capable
*/ */
extern int dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val);
#define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0 #define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0
#define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1 #define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1
#define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE 2 #define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE 2
...@@ -583,7 +583,7 @@ extern int dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val); ...@@ -583,7 +583,7 @@ extern int dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val);
* 0 - Slave * 0 - Slave
* 1 - DMA (default, if available) * 1 - DMA (default, if available)
*/ */
extern int dwc2_set_param_dma_enable(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_dma_enable(struct dwc2_hsotg *hsotg, int val);
/* /*
* When DMA mode is enabled specifies whether to use * When DMA mode is enabled specifies whether to use
...@@ -593,7 +593,7 @@ extern int dwc2_set_param_dma_enable(struct dwc2_hsotg *hsotg, int val); ...@@ -593,7 +593,7 @@ extern int dwc2_set_param_dma_enable(struct dwc2_hsotg *hsotg, int val);
* 0 - address DMA * 0 - address DMA
* 1 - DMA Descriptor(default, if available) * 1 - DMA Descriptor(default, if available)
*/ */
extern int dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val);
/* /*
* Specifies the maximum speed of operation in host and device mode. * Specifies the maximum speed of operation in host and device mode.
...@@ -603,7 +603,7 @@ extern int dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val); ...@@ -603,7 +603,7 @@ extern int dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val);
* 0 - High Speed (default) * 0 - High Speed (default)
* 1 - Full Speed * 1 - Full Speed
*/ */
extern int dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val);
#define DWC2_SPEED_PARAM_HIGH 0 #define DWC2_SPEED_PARAM_HIGH 0
#define DWC2_SPEED_PARAM_FULL 1 #define DWC2_SPEED_PARAM_FULL 1
...@@ -614,8 +614,8 @@ extern int dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val); ...@@ -614,8 +614,8 @@ extern int dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val);
* 0 - Don't support low power mode (default) * 0 - Don't support low power mode (default)
* 1 - Support low power mode * 1 - Support low power mode
*/ */
extern int dwc2_set_param_host_support_fs_ls_low_power(struct dwc2_hsotg *hsotg, extern void dwc2_set_param_host_support_fs_ls_low_power(
int val); struct dwc2_hsotg *hsotg, int val);
/* /*
* Specifies the PHY clock rate in low power mode when connected to a * Specifies the PHY clock rate in low power mode when connected to a
...@@ -626,8 +626,8 @@ extern int dwc2_set_param_host_support_fs_ls_low_power(struct dwc2_hsotg *hsotg, ...@@ -626,8 +626,8 @@ extern int dwc2_set_param_host_support_fs_ls_low_power(struct dwc2_hsotg *hsotg,
* 0 - 48 MHz * 0 - 48 MHz
* 1 - 6 MHz * 1 - 6 MHz
*/ */
extern int dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg, extern void dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg,
int val); int val);
#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0 #define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1 #define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1
...@@ -635,50 +635,50 @@ extern int dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg, ...@@ -635,50 +635,50 @@ extern int dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg,
* 0 - Use cC FIFO size parameters * 0 - Use cC FIFO size parameters
* 1 - Allow dynamic FIFO sizing (default) * 1 - Allow dynamic FIFO sizing (default)
*/ */
extern int dwc2_set_param_enable_dynamic_fifo(struct dwc2_hsotg *hsotg, extern void dwc2_set_param_enable_dynamic_fifo(struct dwc2_hsotg *hsotg,
int val); int val);
/* /*
* Number of 4-byte words in the Rx FIFO in host mode when dynamic * Number of 4-byte words in the Rx FIFO in host mode when dynamic
* FIFO sizing is enabled. * FIFO sizing is enabled.
* 16 to 32768 (default 1024) * 16 to 32768 (default 1024)
*/ */
extern int dwc2_set_param_host_rx_fifo_size(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_host_rx_fifo_size(struct dwc2_hsotg *hsotg, int val);
/* /*
* Number of 4-byte words in the non-periodic Tx FIFO in host mode * Number of 4-byte words in the non-periodic Tx FIFO in host mode
* when Dynamic FIFO sizing is enabled in the core. * when Dynamic FIFO sizing is enabled in the core.
* 16 to 32768 (default 256) * 16 to 32768 (default 256)
*/ */
extern int dwc2_set_param_host_nperio_tx_fifo_size(struct dwc2_hsotg *hsotg, extern void dwc2_set_param_host_nperio_tx_fifo_size(struct dwc2_hsotg *hsotg,
int val); int val);
/* /*
* Number of 4-byte words in the host periodic Tx FIFO when dynamic * Number of 4-byte words in the host periodic Tx FIFO when dynamic
* FIFO sizing is enabled. * FIFO sizing is enabled.
* 16 to 32768 (default 256) * 16 to 32768 (default 256)
*/ */
extern int dwc2_set_param_host_perio_tx_fifo_size(struct dwc2_hsotg *hsotg, extern void dwc2_set_param_host_perio_tx_fifo_size(struct dwc2_hsotg *hsotg,
int val); int val);
/* /*
* The maximum transfer size supported in bytes. * The maximum transfer size supported in bytes.
* 2047 to 65,535 (default 65,535) * 2047 to 65,535 (default 65,535)
*/ */
extern int dwc2_set_param_max_transfer_size(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_max_transfer_size(struct dwc2_hsotg *hsotg, int val);
/* /*
* The maximum number of packets in a transfer. * The maximum number of packets in a transfer.
* 15 to 511 (default 511) * 15 to 511 (default 511)
*/ */
extern int dwc2_set_param_max_packet_count(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_max_packet_count(struct dwc2_hsotg *hsotg, int val);
/* /*
* The number of host channel registers to use. * The number of host channel registers to use.
* 1 to 16 (default 11) * 1 to 16 (default 11)
* Note: The FPGA configuration supports a maximum of 11 host channels. * Note: The FPGA configuration supports a maximum of 11 host channels.
*/ */
extern int dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val);
/* /*
* Specifies the type of PHY interface to use. By default, the driver * Specifies the type of PHY interface to use. By default, the driver
...@@ -688,7 +688,7 @@ extern int dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val); ...@@ -688,7 +688,7 @@ extern int dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val);
* 1 - UTMI+ (default) * 1 - UTMI+ (default)
* 2 - ULPI * 2 - ULPI
*/ */
extern int dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val);
#define DWC2_PHY_TYPE_PARAM_FS 0 #define DWC2_PHY_TYPE_PARAM_FS 0
#define DWC2_PHY_TYPE_PARAM_UTMI 1 #define DWC2_PHY_TYPE_PARAM_UTMI 1
#define DWC2_PHY_TYPE_PARAM_ULPI 2 #define DWC2_PHY_TYPE_PARAM_ULPI 2
...@@ -704,7 +704,7 @@ extern int dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val); ...@@ -704,7 +704,7 @@ extern int dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val);
* *
* 8 or 16 bits (default 16) * 8 or 16 bits (default 16)
*/ */
extern int dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val);
/* /*
* Specifies whether the ULPI operates at double or single * Specifies whether the ULPI operates at double or single
...@@ -716,13 +716,13 @@ extern int dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val); ...@@ -716,13 +716,13 @@ extern int dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val);
* 1 - double data rate ULPI interface with 4 bit wide data * 1 - double data rate ULPI interface with 4 bit wide data
* bus * bus
*/ */
extern int dwc2_set_param_phy_ulpi_ddr(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_phy_ulpi_ddr(struct dwc2_hsotg *hsotg, int val);
/* /*
* Specifies whether to use the internal or external supply to * Specifies whether to use the internal or external supply to
* drive the vbus with a ULPI phy. * drive the vbus with a ULPI phy.
*/ */
extern int dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val);
#define DWC2_PHY_ULPI_INTERNAL_VBUS 0 #define DWC2_PHY_ULPI_INTERNAL_VBUS 0
#define DWC2_PHY_ULPI_EXTERNAL_VBUS 1 #define DWC2_PHY_ULPI_EXTERNAL_VBUS 1
...@@ -732,11 +732,11 @@ extern int dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val); ...@@ -732,11 +732,11 @@ extern int dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val);
* 0 - No (default) * 0 - No (default)
* 1 - Yes * 1 - Yes
*/ */
extern int dwc2_set_param_i2c_enable(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_i2c_enable(struct dwc2_hsotg *hsotg, int val);
extern int dwc2_set_param_ulpi_fs_ls(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_ulpi_fs_ls(struct dwc2_hsotg *hsotg, int val);
extern int dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val);
/* /*
* Specifies whether dedicated transmit FIFOs are * Specifies whether dedicated transmit FIFOs are
...@@ -744,14 +744,14 @@ extern int dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val); ...@@ -744,14 +744,14 @@ extern int dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val);
* 0 - No * 0 - No
* 1 - Yes * 1 - Yes
*/ */
extern int dwc2_set_param_en_multiple_tx_fifo(struct dwc2_hsotg *hsotg, extern void dwc2_set_param_en_multiple_tx_fifo(struct dwc2_hsotg *hsotg,
int val); int val);
extern int dwc2_set_param_reload_ctl(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_reload_ctl(struct dwc2_hsotg *hsotg, int val);
extern int dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val);
extern int dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val); extern void dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val);
/* /*
* Dump core registers and SPRAM * Dump core registers and SPRAM
......
drivers/staging/dwc2/hcd.h
View file @ 7218dae7
...@@ -452,8 +452,8 @@ static inline u8 dwc2_hcd_is_pipe_out(struct dwc2_hcd_pipe_info *pipe) ...@@ -452,8 +452,8 @@ static inline u8 dwc2_hcd_is_pipe_out(struct dwc2_hcd_pipe_info *pipe)
extern int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq, extern int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq,
const struct dwc2_core_params *params); const struct dwc2_core_params *params);
extern void dwc2_hcd_remove(struct dwc2_hsotg *hsotg); extern void dwc2_hcd_remove(struct dwc2_hsotg *hsotg);
extern int dwc2_set_parameters(struct dwc2_hsotg *hsotg, extern void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
const struct dwc2_core_params *params); const struct dwc2_core_params *params);
extern void dwc2_set_all_params(struct dwc2_core_params *params, int value); extern void dwc2_set_all_params(struct dwc2_core_params *params, int value);
extern int dwc2_get_hwparams(struct dwc2_hsotg *hsotg); extern int dwc2_get_hwparams(struct dwc2_hsotg *hsotg);
......
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