Commit 781096d9 authored by James Morse's avatar James Morse Committed by Borislav Petkov

x86/resctrl: Create mba_sc configuration in the rdt_domain

To support resctrl's MBA software controller, the architecture must provide
a second configuration array to hold the mbps_val[] from user-space.

This complicates the interface between the architecture specific code and
the filesystem portions of resctrl that will move to /fs/, to allow
multiple architectures to support resctrl.

Make the filesystem parts of resctrl create an array for the mba_sc
values. The software controller can be changed to use this, allowing
the architecture code to only consider the values configured in hardware.
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarJamie Iles <quic_jiles@quicinc.com>
Reviewed-by: default avatarShaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Tested-by: default avatarXin Hao <xhao@linux.alibaba.com>
Tested-by: default avatarShaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: default avatarCristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-9-james.morse@arm.com
parent b045c215
...@@ -36,7 +36,6 @@ ...@@ -36,7 +36,6 @@
#define MBM_OVERFLOW_INTERVAL 1000 #define MBM_OVERFLOW_INTERVAL 1000
#define MAX_MBA_BW 100u #define MAX_MBA_BW 100u
#define MBA_IS_LINEAR 0x4 #define MBA_IS_LINEAR 0x4
#define MBA_MAX_MBPS U32_MAX
#define MAX_MBA_BW_AMD 0x800 #define MAX_MBA_BW_AMD 0x800
#define MBM_CNTR_WIDTH_OFFSET_AMD 20 #define MBM_CNTR_WIDTH_OFFSET_AMD 20
......
...@@ -1889,6 +1889,30 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *r) ...@@ -1889,6 +1889,30 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *r)
l3_qos_cfg_update(&hw_res->cdp_enabled); l3_qos_cfg_update(&hw_res->cdp_enabled);
} }
static int mba_sc_domain_allocate(struct rdt_resource *r, struct rdt_domain *d)
{
u32 num_closid = resctrl_arch_get_num_closid(r);
int cpu = cpumask_any(&d->cpu_mask);
int i;
d->mbps_val = kcalloc_node(num_closid, sizeof(*d->mbps_val),
GFP_KERNEL, cpu_to_node(cpu));
if (!d->mbps_val)
return -ENOMEM;
for (i = 0; i < num_closid; i++)
d->mbps_val[i] = MBA_MAX_MBPS;
return 0;
}
static void mba_sc_domain_destroy(struct rdt_resource *r,
struct rdt_domain *d)
{
kfree(d->mbps_val);
d->mbps_val = NULL;
}
/* /*
* MBA software controller is supported only if * MBA software controller is supported only if
* MBM is supported and MBA is in linear scale. * MBM is supported and MBA is in linear scale.
...@@ -1908,12 +1932,20 @@ static bool supports_mba_mbps(void) ...@@ -1908,12 +1932,20 @@ static bool supports_mba_mbps(void)
static int set_mba_sc(bool mba_sc) static int set_mba_sc(bool mba_sc)
{ {
struct rdt_resource *r = &rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl; struct rdt_resource *r = &rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl;
u32 num_closid = resctrl_arch_get_num_closid(r);
struct rdt_domain *d;
int i;
if (!supports_mba_mbps() || mba_sc == is_mba_sc(r)) if (!supports_mba_mbps() || mba_sc == is_mba_sc(r))
return -EINVAL; return -EINVAL;
r->membw.mba_sc = mba_sc; r->membw.mba_sc = mba_sc;
list_for_each_entry(d, &r->domains, list) {
for (i = 0; i < num_closid; i++)
d->mbps_val[i] = MBA_MAX_MBPS;
}
return 0; return 0;
} }
...@@ -3247,6 +3279,9 @@ void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d) ...@@ -3247,6 +3279,9 @@ void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d)
{ {
lockdep_assert_held(&rdtgroup_mutex); lockdep_assert_held(&rdtgroup_mutex);
if (supports_mba_mbps() && r->rid == RDT_RESOURCE_MBA)
mba_sc_domain_destroy(r, d);
if (!r->mon_capable) if (!r->mon_capable)
return; return;
...@@ -3311,6 +3346,10 @@ int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d) ...@@ -3311,6 +3346,10 @@ int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d)
lockdep_assert_held(&rdtgroup_mutex); lockdep_assert_held(&rdtgroup_mutex);
if (supports_mba_mbps() && r->rid == RDT_RESOURCE_MBA)
/* RDT_RESOURCE_MBA is never mon_capable */
return mba_sc_domain_allocate(r, d);
if (!r->mon_capable) if (!r->mon_capable)
return 0; return 0;
......
...@@ -15,6 +15,9 @@ int proc_resctrl_show(struct seq_file *m, ...@@ -15,6 +15,9 @@ int proc_resctrl_show(struct seq_file *m,
#endif #endif
/* max value for struct rdt_domain's mbps_val */
#define MBA_MAX_MBPS U32_MAX
/** /**
* enum resctrl_conf_type - The type of configuration. * enum resctrl_conf_type - The type of configuration.
* @CDP_NONE: No prioritisation, both code and data are controlled or monitored. * @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
...@@ -53,6 +56,9 @@ struct resctrl_staged_config { ...@@ -53,6 +56,9 @@ struct resctrl_staged_config {
* @cqm_work_cpu: worker CPU for CQM h/w counters * @cqm_work_cpu: worker CPU for CQM h/w counters
* @plr: pseudo-locked region (if any) associated with domain * @plr: pseudo-locked region (if any) associated with domain
* @staged_config: parsed configuration to be applied * @staged_config: parsed configuration to be applied
* @mbps_val: When mba_sc is enabled, this holds the array of user
* specified control values for mba_sc in MBps, indexed
* by closid
*/ */
struct rdt_domain { struct rdt_domain {
struct list_head list; struct list_head list;
...@@ -67,6 +73,7 @@ struct rdt_domain { ...@@ -67,6 +73,7 @@ struct rdt_domain {
int cqm_work_cpu; int cqm_work_cpu;
struct pseudo_lock_region *plr; struct pseudo_lock_region *plr;
struct resctrl_staged_config staged_config[CDP_NUM_TYPES]; struct resctrl_staged_config staged_config[CDP_NUM_TYPES];
u32 *mbps_val;
}; };
/** /**
......
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