Commit 782cef7f authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher

drm/amd/display: apply vmin optimization even if it doesn't reach vmin level

[why]
Based on power measurement result, in most cases when display clock
is higher than Vmin display clock, lowering display clock using
dynamic ODM will improve overall power consumption by 0 to 4 watts
even if we can't reach Vmin.

[how]
Allow vmin optimization applied even if dispclk can't reach Vmin.
Reviewed-by: default avatarAustin Zheng <austin.zheng@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 596a4ec7
...@@ -717,6 +717,8 @@ bool pmo_dcn4_fams2_init_for_vmin(struct dml2_pmo_init_for_vmin_in_out *in_out) ...@@ -717,6 +717,8 @@ bool pmo_dcn4_fams2_init_for_vmin(struct dml2_pmo_init_for_vmin_in_out *in_out)
&in_out->base_display_config->display_config; &in_out->base_display_config->display_config;
const struct dml2_core_mode_support_result *mode_support_result = const struct dml2_core_mode_support_result *mode_support_result =
&in_out->base_display_config->mode_support_result; &in_out->base_display_config->mode_support_result;
struct dml2_optimization_stage4_state *state =
&in_out->base_display_config->stage4;
if (in_out->instance->options->disable_dyn_odm || if (in_out->instance->options->disable_dyn_odm ||
(in_out->instance->options->disable_dyn_odm_for_multi_stream && display_config->num_streams > 1)) (in_out->instance->options->disable_dyn_odm_for_multi_stream && display_config->num_streams > 1))
...@@ -737,28 +739,30 @@ bool pmo_dcn4_fams2_init_for_vmin(struct dml2_pmo_init_for_vmin_in_out *in_out) ...@@ -737,28 +739,30 @@ bool pmo_dcn4_fams2_init_for_vmin(struct dml2_pmo_init_for_vmin_in_out *in_out)
*/ */
if (mode_support_result->cfg_support_info.plane_support_info[i].dpps_used > 1 && if (mode_support_result->cfg_support_info.plane_support_info[i].dpps_used > 1 &&
mode_support_result->cfg_support_info.stream_support_info[display_config->plane_descriptors[i].stream_index].odms_used == 1) mode_support_result->cfg_support_info.stream_support_info[display_config->plane_descriptors[i].stream_index].odms_used == 1)
in_out->base_display_config->stage4.unoptimizable_streams[display_config->plane_descriptors[i].stream_index] = true; state->unoptimizable_streams[display_config->plane_descriptors[i].stream_index] = true;
for (i = 0; i < display_config->num_streams; i++) { for (i = 0; i < display_config->num_streams; i++) {
if (display_config->stream_descriptors[i].overrides.disable_dynamic_odm) if (display_config->stream_descriptors[i].overrides.disable_dynamic_odm)
in_out->base_display_config->stage4.unoptimizable_streams[i] = true; state->unoptimizable_streams[i] = true;
else if (in_out->base_display_config->stage3.stream_svp_meta[i].valid && else if (in_out->base_display_config->stage3.stream_svp_meta[i].valid &&
in_out->instance->options->disable_dyn_odm_for_stream_with_svp) in_out->instance->options->disable_dyn_odm_for_stream_with_svp)
in_out->base_display_config->stage4.unoptimizable_streams[i] = true; state->unoptimizable_streams[i] = true;
/* /*
* ODM Combine requires horizontal timing divisible by 2 so each * ODM Combine requires horizontal timing divisible by 2 so each
* ODM segment has the same size. * ODM segment has the same size.
*/ */
else if (!is_h_timing_divisible_by(&display_config->stream_descriptors[i].timing, 2)) else if (!is_h_timing_divisible_by(&display_config->stream_descriptors[i].timing, 2))
in_out->base_display_config->stage4.unoptimizable_streams[i] = true; state->unoptimizable_streams[i] = true;
/* /*
* Our hardware support seamless ODM transitions for DP encoders * Our hardware support seamless ODM transitions for DP encoders
* only. * only.
*/ */
else if (!is_dp_encoder(display_config->stream_descriptors[i].output.output_encoder)) else if (!is_dp_encoder(display_config->stream_descriptors[i].output.output_encoder))
in_out->base_display_config->stage4.unoptimizable_streams[i] = true; state->unoptimizable_streams[i] = true;
} }
state->performed = true;
return true; return true;
} }
......
...@@ -266,9 +266,18 @@ bool dml2_build_mode_programming(struct dml2_build_mode_programming_in_out *in_o ...@@ -266,9 +266,18 @@ bool dml2_build_mode_programming(struct dml2_build_mode_programming_in_out *in_o
vmin_success = dml2_top_optimization_perform_optimization_phase(&l->optimization_phase_locals, &l->vmin_phase); vmin_success = dml2_top_optimization_perform_optimization_phase(&l->optimization_phase_locals, &l->vmin_phase);
if (vmin_success) { if (l->optimized_display_config_with_meta.stage4.performed) {
/*
* when performed is true, optimization has applied to
* optimized_display_config_with_meta and it has passed mode
* support. However it may or may not pass the test function to
* reach actual Vmin. As long as voltage is optimized even if it
* doesn't reach Vmin level, there is still power benefit so in
* this case we will still copy this optimization into base
* display config.
*/
memcpy(&l->base_display_config_with_meta, &l->optimized_display_config_with_meta, sizeof(struct display_configuation_with_meta)); memcpy(&l->base_display_config_with_meta, &l->optimized_display_config_with_meta, sizeof(struct display_configuation_with_meta));
l->base_display_config_with_meta.stage4.success = true; l->base_display_config_with_meta.stage4.success = vmin_success;
} }
/* /*
......
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