Commit 7a893345 authored by Michal Wajdeczko's avatar Michal Wajdeczko

drm/xe/guc: Move ARAT interrupts enabling to the upload step

Even though ARAT interrupts are enabled by default, we still want
to keep the code that enables them. But instead doing that in the
CTB enabling step, move this code to the upload step, where we
already setup few other registers related to GuC.
Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240619163413.817-1-michal.wajdeczko@intel.com
parent 8e7455dd
...@@ -476,6 +476,9 @@ static void guc_prepare_xfer(struct xe_guc *guc) ...@@ -476,6 +476,9 @@ static void guc_prepare_xfer(struct xe_guc *guc)
xe_mmio_write32(gt, GUC_SHIM_CONTROL, shim_flags); xe_mmio_write32(gt, GUC_SHIM_CONTROL, shim_flags);
xe_mmio_write32(gt, GT_PM_CONFIG, GT_DOORBELL_ENABLE); xe_mmio_write32(gt, GT_PM_CONFIG, GT_DOORBELL_ENABLE);
/* Make sure GuC receives ARAT interrupts */
xe_mmio_rmw32(gt, PMINTRMSK, ARAT_EXPIRED_INTRMSK, 0);
} }
/* /*
...@@ -865,9 +868,6 @@ int xe_guc_enable_communication(struct xe_guc *guc) ...@@ -865,9 +868,6 @@ int xe_guc_enable_communication(struct xe_guc *guc)
guc_enable_irq(guc); guc_enable_irq(guc);
} }
xe_mmio_rmw32(guc_to_gt(guc), PMINTRMSK,
ARAT_EXPIRED_INTRMSK, 0);
err = xe_guc_ct_enable(&guc->ct); err = xe_guc_ct_enable(&guc->ct);
if (err) if (err)
return err; return err;
......
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