Commit 839eb4bb authored by Jesse Zhang's avatar Jesse Zhang Committed by Alex Deucher

drm/amd/pm: remove dead code in navi10_emit_clk_levels and navi10_print_clk_levels

Since the range of the varibable i is 0 - 3.
So execution cannot reach this statement: default.
Signed-off-by: default avatarJesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarTim Huang <Tim.Huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 27b500b7
...@@ -1389,8 +1389,6 @@ static int navi10_emit_clk_levels(struct smu_context *smu, ...@@ -1389,8 +1389,6 @@ static int navi10_emit_clk_levels(struct smu_context *smu,
case 2: case 2:
curve_settings = &od_table->GfxclkFreq3; curve_settings = &od_table->GfxclkFreq3;
break; break;
default:
break;
} }
*offset += sysfs_emit_at(buf, *offset, "%d: %uMHz %umV\n", *offset += sysfs_emit_at(buf, *offset, "%d: %uMHz %umV\n",
i, curve_settings[0], i, curve_settings[0],
...@@ -1594,8 +1592,6 @@ static int navi10_print_clk_levels(struct smu_context *smu, ...@@ -1594,8 +1592,6 @@ static int navi10_print_clk_levels(struct smu_context *smu,
case 2: case 2:
curve_settings = &od_table->GfxclkFreq3; curve_settings = &od_table->GfxclkFreq3;
break; break;
default:
break;
} }
size += sysfs_emit_at(buf, size, "%d: %uMHz %umV\n", size += sysfs_emit_at(buf, size, "%d: %uMHz %umV\n",
i, curve_settings[0], i, curve_settings[0],
......
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