Commit 8486bddc authored by Colin Cross's avatar Colin Cross

[ARM] tegra: common: Update common clock init table

Renames clocks in the clock init table to match the datasheet names
Signed-off-by: default avatarColin Cross <ccross@android.com>
parent 71fc84cc
...@@ -36,8 +36,8 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { ...@@ -36,8 +36,8 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
{ "pll_p_out2", "pll_p", 48000000, true }, { "pll_p_out2", "pll_p", 48000000, true },
{ "pll_p_out3", "pll_p", 72000000, true }, { "pll_p_out3", "pll_p", 72000000, true },
{ "pll_p_out4", "pll_p", 108000000, true }, { "pll_p_out4", "pll_p", 108000000, true },
{ "sys", "pll_p_out4", 108000000, true }, { "sclk", "pll_p_out4", 108000000, true },
{ "hclk", "sys", 108000000, true }, { "hclk", "sclk", 108000000, true },
{ "pclk", "hclk", 54000000, true }, { "pclk", "hclk", 54000000, true },
{ NULL, NULL, 0, 0}, { NULL, NULL, 0, 0},
}; };
......
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