Commit 84c4f46d authored by Brian Norris's avatar Brian Norris Committed by David Woodhouse

mtd/nand_ids: Fix buswidth

The buswidth for chips of ID 0xD7 is x8, not x16.
This was my previous typo.
Signed-off-by: default avatarBrian Norris <norris@broadcom.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent f78ec6b2
...@@ -112,7 +112,7 @@ struct nand_flash_dev nand_flash_ids[] = { ...@@ -112,7 +112,7 @@ struct nand_flash_dev nand_flash_ids[] = {
{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
/* 32 Gigabit */ /* 32 Gigabit */
{"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS16}, {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS},
/* /*
* Renesas AND 1 Gigabit. Those chips do not support extended id and * Renesas AND 1 Gigabit. Those chips do not support extended id and
......
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