Commit 86c03a0f authored by Parthiban Veerasooran's avatar Parthiban Veerasooran Committed by Jakub Kicinski

net: ethernet: oa_tc6: implement error interrupts unmasking

This will unmask the following error interrupts from the MAC-PHY.
  tx protocol error
  rx buffer overflow error
  loss of framing error
  header error
The MAC-PHY will signal an error by setting the EXST bit in the receive
data footer which will then allow the host to read the STATUS0 register
to find the source of the error.
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarParthiban Veerasooran <Parthiban.Veerasooran@microchip.com>
Link: https://patch.msgid.link/20240909082514.262942-6-Parthiban.Veerasooran@microchip.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 1f9c4eed
...@@ -18,6 +18,13 @@ ...@@ -18,6 +18,13 @@
#define OA_TC6_REG_STATUS0 0x0008 #define OA_TC6_REG_STATUS0 0x0008
#define STATUS0_RESETC BIT(6) /* Reset Complete */ #define STATUS0_RESETC BIT(6) /* Reset Complete */
/* Interrupt Mask Register #0 */
#define OA_TC6_REG_INT_MASK0 0x000C
#define INT_MASK0_HEADER_ERR_MASK BIT(5)
#define INT_MASK0_LOSS_OF_FRAME_ERR_MASK BIT(4)
#define INT_MASK0_RX_BUFFER_OVERFLOW_ERR_MASK BIT(3)
#define INT_MASK0_TX_PROTOCOL_ERR_MASK BIT(0)
/* Control command header */ /* Control command header */
#define OA_TC6_CTRL_HEADER_DATA_NOT_CTRL BIT(31) #define OA_TC6_CTRL_HEADER_DATA_NOT_CTRL BIT(31)
#define OA_TC6_CTRL_HEADER_WRITE_NOT_READ BIT(29) #define OA_TC6_CTRL_HEADER_WRITE_NOT_READ BIT(29)
...@@ -327,6 +334,23 @@ static int oa_tc6_sw_reset_macphy(struct oa_tc6 *tc6) ...@@ -327,6 +334,23 @@ static int oa_tc6_sw_reset_macphy(struct oa_tc6 *tc6)
return oa_tc6_write_register(tc6, OA_TC6_REG_STATUS0, regval); return oa_tc6_write_register(tc6, OA_TC6_REG_STATUS0, regval);
} }
static int oa_tc6_unmask_macphy_error_interrupts(struct oa_tc6 *tc6)
{
u32 regval;
int ret;
ret = oa_tc6_read_register(tc6, OA_TC6_REG_INT_MASK0, &regval);
if (ret)
return ret;
regval &= ~(INT_MASK0_TX_PROTOCOL_ERR_MASK |
INT_MASK0_RX_BUFFER_OVERFLOW_ERR_MASK |
INT_MASK0_LOSS_OF_FRAME_ERR_MASK |
INT_MASK0_HEADER_ERR_MASK);
return oa_tc6_write_register(tc6, OA_TC6_REG_INT_MASK0, regval);
}
/** /**
* oa_tc6_init - allocates and initializes oa_tc6 structure. * oa_tc6_init - allocates and initializes oa_tc6 structure.
* @spi: device with which data will be exchanged. * @spi: device with which data will be exchanged.
...@@ -369,6 +393,13 @@ struct oa_tc6 *oa_tc6_init(struct spi_device *spi) ...@@ -369,6 +393,13 @@ struct oa_tc6 *oa_tc6_init(struct spi_device *spi)
return NULL; return NULL;
} }
ret = oa_tc6_unmask_macphy_error_interrupts(tc6);
if (ret) {
dev_err(&tc6->spi->dev,
"MAC-PHY error interrupts unmask failed: %d\n", ret);
return NULL;
}
return tc6; return tc6;
} }
EXPORT_SYMBOL_GPL(oa_tc6_init); EXPORT_SYMBOL_GPL(oa_tc6_init);
......
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