Commit 8bb2e2a8 authored by Alexander Monakov's avatar Alexander Monakov Committed by Rafael J. Wysocki

intel_idle: mention assumption that WBINVD is not needed

Intel SDM does not explicitly say that entering a C-state via MWAIT will
implicitly flush CPU caches as appropriate for that C-state. However,
documentation for individual Intel CPU generations does mention this
behavior.

Since intel_idle binds to any Intel CPU with MWAIT, list this assumption
of MWAIT behavior.

In passing, reword opening comment to make it clear that the driver can
load on any old and future Intel CPU with MWAIT.
Signed-off-by: default avatarAlexander Monakov <amonakov@ispras.ru>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent e0578334
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
*/ */
/* /*
* intel_idle is a cpuidle driver that loads on specific Intel processors * intel_idle is a cpuidle driver that loads on all Intel CPUs with MWAIT
* in lieu of the legacy ACPI processor_idle driver. The intent is to * in lieu of the legacy ACPI processor_idle driver. The intent is to
* make Linux more efficient on these processors, as intel_idle knows * make Linux more efficient on these processors, as intel_idle knows
* more than ACPI, as well as make Linux more immune to ACPI BIOS bugs. * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
...@@ -20,7 +20,11 @@ ...@@ -20,7 +20,11 @@
* All CPUs have same idle states as boot CPU * All CPUs have same idle states as boot CPU
* *
* Chipset BM_STS (bus master status) bit is a NOP * Chipset BM_STS (bus master status) bit is a NOP
* for preventing entry into deep C-stats * for preventing entry into deep C-states
*
* CPU will flush caches as needed when entering a C-state via MWAIT
* (in contrast to entering ACPI C3, in which case the WBINVD
* instruction needs to be executed to flush the caches)
*/ */
/* /*
......
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