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Commit 8c3abc7d authored by Russell King's avatar Russell King Committed by Russell King
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[ARM] pxa: convert to clkdev and match clocks by struct device where possible 

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 71a06da0
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Showing with 201 additions and 205 deletions
arch/arm/Kconfig
View file @ 8c3abc7d
...@@ -457,6 +457,7 @@ config ARCH_PXA ...@@ -457,6 +457,7 @@ config ARCH_PXA
select ARCH_MTD_XIP select ARCH_MTD_XIP
select GENERIC_GPIO select GENERIC_GPIO
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
......
arch/arm/mach-pxa/clock.c
View file @ 8c3abc7d
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <asm/clkdev.h>
#include <mach/pxa2xx-regs.h> #include <mach/pxa2xx-regs.h>
#include <mach/pxa2xx-gpio.h> #include <mach/pxa2xx-gpio.h>
#include <mach/hardware.h> #include <mach/hardware.h>
...@@ -20,45 +21,8 @@ ...@@ -20,45 +21,8 @@
#include "generic.h" #include "generic.h"
#include "clock.h" #include "clock.h"
static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static DEFINE_SPINLOCK(clocks_lock); static DEFINE_SPINLOCK(clocks_lock);
static struct clk *clk_lookup(struct device *dev, const char *id)
{
struct clk *p;
list_for_each_entry(p, &clocks, node)
if (strcmp(id, p->name) == 0 && p->dev == dev)
return p;
return NULL;
}
struct clk *clk_get(struct device *dev, const char *id)
{
struct clk *p, *clk = ERR_PTR(-ENOENT);
mutex_lock(&clocks_mutex);
p = clk_lookup(dev, id);
if (!p)
p = clk_lookup(NULL, id);
if (p)
clk = p;
mutex_unlock(&clocks_mutex);
if (!IS_ERR(clk) && clk->ops == NULL)
clk = clk->other;
return clk;
}
EXPORT_SYMBOL(clk_get);
void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);
int clk_enable(struct clk *clk) int clk_enable(struct clk *clk)
{ {
unsigned long flags; unsigned long flags;
...@@ -116,37 +80,27 @@ const struct clkops clk_cken_ops = { ...@@ -116,37 +80,27 @@ const struct clkops clk_cken_ops = {
.disable = clk_cken_disable, .disable = clk_cken_disable,
}; };
void clks_register(struct clk *clks, size_t num) void clks_register(struct clk_lookup *clks, size_t num)
{ {
int i; int i;
mutex_lock(&clocks_mutex);
for (i = 0; i < num; i++) for (i = 0; i < num; i++)
list_add(&clks[i].node, &clocks); clkdev_add(&clks[i]);
mutex_unlock(&clocks_mutex);
} }
int clk_add_alias(char *alias, struct device *alias_dev, char *id, int clk_add_alias(char *alias, struct device *alias_dev, char *id,
struct device *dev) struct device *dev)
{ {
struct clk *r = clk_lookup(dev, id); struct clk *r = clk_get(dev, id);
struct clk *new; struct clk_lookup *l;
if (!r) if (!r)
return -ENODEV; return -ENODEV;
new = kzalloc(sizeof(struct clk), GFP_KERNEL); l = clkdev_alloc(r, alias, alias_dev ? dev_name(alias_dev) : NULL);
clk_put(r);
if (!new) if (!l)
return -ENOMEM; return -ENODEV;
clkdev_add(l);
new->name = alias;
new->dev = alias_dev;
new->other = r;
mutex_lock(&clocks_mutex);
list_add(&new->node, &clocks);
mutex_unlock(&clocks_mutex);
return 0; return 0;
} }
arch/arm/mach-pxa/clock.h
View file @ 8c3abc7d
#include <linux/list.h> #include <asm/clkdev.h>
struct clk;
struct clkops { struct clkops {
void (*enable)(struct clk *); void (*enable)(struct clk *);
...@@ -9,9 +7,6 @@ struct clkops { ...@@ -9,9 +7,6 @@ struct clkops {
}; };
struct clk { struct clk {
struct list_head node;
const char *name;
struct device *dev;
const struct clkops *ops; const struct clkops *ops;
unsigned long rate; unsigned long rate;
unsigned int cken; unsigned int cken;
...@@ -20,39 +15,29 @@ struct clk { ...@@ -20,39 +15,29 @@ struct clk {
struct clk *other; struct clk *other;
}; };
#define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ #define INIT_CLKREG(_clk,_devname,_conname) \
{ \ { \
.name = _name, \ .clk = _clk, \
.dev = _dev, \ .dev_id = _devname, \
.con_id = _conname, \
}
#define DEFINE_CKEN(_name, _cken, _rate, _delay) \
struct clk clk_##_name = { \
.ops = &clk_cken_ops, \ .ops = &clk_cken_ops, \
.rate = _rate, \ .rate = _rate, \
.cken = CKEN_##_cken, \ .cken = CKEN_##_cken, \
.delay = _delay, \ .delay = _delay, \
} }
#define INIT_CK(_name, _cken, _ops, _dev) \ #define DEFINE_CK(_name, _cken, _ops) \
{ \ struct clk clk_##_name = { \
.name = _name, \
.dev = _dev, \
.ops = _ops, \ .ops = _ops, \
.cken = CKEN_##_cken, \ .cken = CKEN_##_cken, \
} }
/* #define DEFINE_CLK(_name, _ops, _rate, _delay) \
* This is a placeholder to alias one clock device+name pair struct clk clk_##_name = { \
* to another struct clk.
*/
#define INIT_CKOTHER(_name, _other, _dev) \
{ \
.name = _name, \
.dev = _dev, \
.other = _other, \
}
#define INIT_CLK(_name, _ops, _rate, _delay, _dev) \
{ \
.name = _name, \
.dev = _dev, \
.ops = _ops, \ .ops = _ops, \
.rate = _rate, \ .rate = _rate, \
.delay = _delay, \ .delay = _delay, \
...@@ -64,20 +49,16 @@ void clk_cken_enable(struct clk *clk); ...@@ -64,20 +49,16 @@ void clk_cken_enable(struct clk *clk);
void clk_cken_disable(struct clk *clk); void clk_cken_disable(struct clk *clk);
#ifdef CONFIG_PXA3xx #ifdef CONFIG_PXA3xx
#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \ #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
{ \ struct clk clk_##_name = { \
.name = _name, \
.dev = _dev, \
.ops = &clk_pxa3xx_cken_ops, \ .ops = &clk_pxa3xx_cken_ops, \
.rate = _rate, \ .rate = _rate, \
.cken = CKEN_##_cken, \ .cken = CKEN_##_cken, \
.delay = _delay, \ .delay = _delay, \
} }
#define PXA3xx_CK(_name, _cken, _ops, _dev) \ #define DEFINE_PXA3_CK(_name, _cken, _ops) \
{ \ struct clk clk_##_name = { \
.name = _name, \
.dev = _dev, \
.ops = _ops, \ .ops = _ops, \
.cken = CKEN_##_cken, \ .cken = CKEN_##_cken, \
} }
...@@ -87,7 +68,7 @@ extern void clk_pxa3xx_cken_enable(struct clk *); ...@@ -87,7 +68,7 @@ extern void clk_pxa3xx_cken_enable(struct clk *);
extern void clk_pxa3xx_cken_disable(struct clk *); extern void clk_pxa3xx_cken_disable(struct clk *);
#endif #endif
void clks_register(struct clk *clks, size_t num); void clks_register(struct clk_lookup *clks, size_t num);
int clk_add_alias(char *alias, struct device *alias_dev, char *id, int clk_add_alias(char *alias, struct device *alias_dev, char *id,
struct device *dev); struct device *dev);
arch/arm/mach-pxa/include/mach/clkdev.h 0 → 100644
View file @ 8c3abc7d
#ifndef __ASM_MACH_CLKDEV_H
#define __ASM_MACH_CLKDEV_H
#define __clk_get(clk) ({ 1; })
#define __clk_put(clk) do { } while (0)
#endif
arch/arm/mach-pxa/pxa25x.c
View file @ 8c3abc7d
...@@ -167,36 +167,51 @@ static const struct clkops clk_pxa25x_gpio11_ops = { ...@@ -167,36 +167,51 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
* 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
*/ */
static struct clk pxa25x_hwuart_clk = static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
; static struct clk_lookup pxa25x_hwuart_clkreg =
INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
/* /*
* PXA 2xx clock declarations. * PXA 2xx clock declarations.
*/ */
static struct clk pxa25x_clks[] = { static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev), static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL), static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL), static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0);
INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev), static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev), static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev), static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev), static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev), static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
static struct clk_lookup pxa25x_clkregs[] = {
/* INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
*/ INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
INIT_CLKREG(&clk_pxa25x_usb, "pxa25x-udc", NULL),
INIT_CLKREG(&clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),
INIT_CLKREG(&clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),
INIT_CLKREG(&clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),
INIT_CLKREG(&clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),
INIT_CLKREG(&clk_pxa25x_assp, "pxa25x-nssp.2", NULL),
INIT_CLKREG(&clk_pxa25x_pwm0, "pxa25x-pwm.0", NULL),
INIT_CLKREG(&clk_pxa25x_pwm1, "pxa25x-pwm.1", NULL),
INIT_CLKREG(&clk_pxa25x_i2s, "pxa2xx-i2s", NULL),
INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-ir", "UARTCLK"),
INIT_CLKREG(&clk_pxa25x_ficp, "pxa2xx-ir", "FICPCLK"),
INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
}; };
#ifdef CONFIG_PM #ifdef CONFIG_PM
...@@ -336,7 +351,7 @@ static int __init pxa25x_init(void) ...@@ -336,7 +351,7 @@ static int __init pxa25x_init(void)
reset_status = RCSR; reset_status = RCSR;
clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
if ((ret = pxa_init_dma(16))) if ((ret = pxa_init_dma(16)))
return ret; return ret;
...@@ -357,7 +372,7 @@ static int __init pxa25x_init(void) ...@@ -357,7 +372,7 @@ static int __init pxa25x_init(void)
/* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */ /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
if (cpu_is_pxa255() || cpu_is_pxa26x()) { if (cpu_is_pxa255() || cpu_is_pxa26x()) {
clks_register(&pxa25x_hwuart_clk, 1); clks_register(&pxa25x_hwuart_clkreg, 1);
ret = platform_device_register(&pxa_device_hwuart); ret = platform_device_register(&pxa_device_hwuart);
} }
......
arch/arm/mach-pxa/pxa27x.c
View file @ 8c3abc7d
...@@ -144,40 +144,59 @@ static const struct clkops clk_pxa27x_lcd_ops = { ...@@ -144,40 +144,59 @@ static const struct clkops clk_pxa27x_lcd_ops = {
.getrate = clk_pxa27x_lcd_getrate, .getrate = clk_pxa27x_lcd_getrate,
}; };
static struct clk pxa27x_clks[] = { static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev), static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL), static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev), static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev), static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL), static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev), static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa27x_device_udc.dev), static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev), static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev), static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev), static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev), static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev), static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev), static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
static struct clk_lookup pxa27x_clkregs[] = {
/* INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL),
INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
INIT_CKEN("IMCLK", IM, 0, 0, NULL), INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL), INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL),
*/ INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),
INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL),
INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),
INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),
INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"),
INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL),
INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL),
INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL),
INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL),
INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL),
INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL),
INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL),
INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL),
INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"),
INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"),
INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"),
INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"),
INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
}; };
#ifdef CONFIG_PM #ifdef CONFIG_PM
...@@ -380,7 +399,7 @@ static int __init pxa27x_init(void) ...@@ -380,7 +399,7 @@ static int __init pxa27x_init(void)
reset_status = RCSR; reset_status = RCSR;
clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
if ((ret = pxa_init_dma(32))) if ((ret = pxa_init_dma(32)))
return ret; return ret;
......
arch/arm/mach-pxa/pxa300.c
View file @ 8c3abc7d
...@@ -85,14 +85,16 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { ...@@ -85,14 +85,16 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
MFP_ADDR_END, MFP_ADDR_END,
}; };
static struct clk common_clks[] = { static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev),
static struct clk_lookup common_clkregs[] = {
INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"),
}; };
static struct clk pxa310_clks[] = { static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
#ifdef CONFIG_CPU_PXA310
PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), static struct clk_lookup pxa310_clkregs[] = {
#endif INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"),
}; };
static int __init pxa300_init(void) static int __init pxa300_init(void)
...@@ -100,12 +102,12 @@ static int __init pxa300_init(void) ...@@ -100,12 +102,12 @@ static int __init pxa300_init(void)
if (cpu_is_pxa300() || cpu_is_pxa310()) { if (cpu_is_pxa300() || cpu_is_pxa310()) {
pxa3xx_init_mfp(); pxa3xx_init_mfp();
pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
clks_register(ARRAY_AND_SIZE(common_clks)); clks_register(ARRAY_AND_SIZE(common_clkregs));
} }
if (cpu_is_pxa310()) { if (cpu_is_pxa310()) {
pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); pxa3xx_mfp_init_addr(pxa310_mfp_addr_map);
clks_register(ARRAY_AND_SIZE(pxa310_clks)); clks_register(ARRAY_AND_SIZE(pxa310_clkregs));
} }
return 0; return 0;
......
arch/arm/mach-pxa/pxa320.c
View file @ 8c3abc7d
...@@ -80,8 +80,10 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { ...@@ -80,8 +80,10 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
MFP_ADDR_END, MFP_ADDR_END,
}; };
static struct clk pxa320_clks[] = { static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev),
static struct clk_lookup pxa320_clkregs[] = {
INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"),
}; };
static int __init pxa320_init(void) static int __init pxa320_init(void)
...@@ -89,7 +91,7 @@ static int __init pxa320_init(void) ...@@ -89,7 +91,7 @@ static int __init pxa320_init(void)
if (cpu_is_pxa320()) { if (cpu_is_pxa320()) {
pxa3xx_init_mfp(); pxa3xx_init_mfp();
pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
clks_register(ARRAY_AND_SIZE(pxa320_clks)); clks_register(ARRAY_AND_SIZE(pxa320_clkregs));
} }
return 0; return 0;
......
arch/arm/mach-pxa/pxa3xx.c
View file @ 8c3abc7d
...@@ -216,43 +216,58 @@ static const struct clkops clk_dummy_ops = { ...@@ -216,43 +216,58 @@ static const struct clkops clk_dummy_ops = {
.disable = clk_dummy_disable, .disable = clk_dummy_disable,
}; };
static struct clk pxa3xx_clks[] = { static struct clk clk_pxa3xx_pout = {
{
.name = "CLK_POUT",
.ops = &clk_pout_ops, .ops = &clk_pout_ops,
.rate = 13000000, .rate = 13000000,
.delay = 70, .delay = 70,
}, };
/* Power I2C clock is always on */ static struct clk clk_dummy = {
{
.name = "I2CCLK",
.ops = &clk_dummy_ops, .ops = &clk_dummy_ops,
.dev = &pxa3xx_device_i2c_power.dev, };
},
PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL),
PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa27x_device_udc.dev),
PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
PXA3xx_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
PXA3xx_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5);
static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0);
static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_ssp3, SSP3, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_ssp4, SSP4, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
static struct clk_lookup pxa3xx_clkregs[] = {
INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
/* Power I2C clock is always on */
INIT_CLKREG(&clk_dummy, "pxa2xx-i2c.1", NULL),
INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
INIT_CLKREG(&clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),
INIT_CLKREG(&clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),
INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),
INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-ir", "UARTCLK"),
INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL),
INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL),
INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL),
INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL),
INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL),
INIT_CLKREG(&clk_pxa3xx_ssp3, "pxa27x-ssp.2", NULL),
INIT_CLKREG(&clk_pxa3xx_ssp4, "pxa27x-ssp.3", NULL),
INIT_CLKREG(&clk_pxa3xx_pwm0, "pxa27x-pwm.0", NULL),
INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
}; };
#ifdef CONFIG_PM #ifdef CONFIG_PM
...@@ -595,7 +610,7 @@ static int __init pxa3xx_init(void) ...@@ -595,7 +610,7 @@ static int __init pxa3xx_init(void)
*/ */
ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks)); clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));
if ((ret = pxa_init_dma(32))) if ((ret = pxa_init_dma(32)))
return ret; return ret;
......
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