Commit 8eba8ea2 authored by Kukjin Kim's avatar Kukjin Kim

ARM: S3C64XX: make regs-srom.h local

The header file can be local in mach-s3c64xx/.
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent a81c1970
......@@ -31,7 +31,6 @@
#include <mach/map.h>
#include <mach/regs-gpio.h>
#include <mach/regs-srom.h>
#include <plat/adc.h>
#include <plat/cpu.h>
......@@ -46,6 +45,7 @@
#include "common.h"
#include "regs-modem.h"
#include "regs-srom.h"
#define UCON S3C2410_UCON_DEFAULT
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
......
......@@ -32,7 +32,6 @@
#include <mach/map.h>
#include <mach/regs-gpio.h>
#include <mach/regs-srom.h>
#include <plat/adc.h>
#include <plat/cpu.h>
......@@ -47,6 +46,7 @@
#include "common.h"
#include "regs-modem.h"
#include "regs-srom.h"
#define UCON S3C2410_UCON_DEFAULT
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
......
......@@ -59,7 +59,6 @@
#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
#include <mach/regs-sys.h>
#include <mach/regs-srom.h>
#include <linux/platform_data/ata-samsung_cf.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/fb.h>
......@@ -75,6 +74,7 @@
#include "common.h"
#include "regs-modem.h"
#include "regs-srom.h"
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
......
/* arch/arm/plat-s3c64xx/include/plat/regs-srom.h
*
/*
* Copyright 2009 Andy Green <andy@warmcat.com>
*
* S3C64XX SROM definitions
......@@ -9,8 +8,8 @@
* published by the Free Software Foundation.
*/
#ifndef __PLAT_REGS_SROM_H
#define __PLAT_REGS_SROM_H __FILE__
#ifndef __MACH_S3C64XX_REGS_SROM_H
#define __MACH_S3C64XX_REGS_SROM_H __FILE__
#define S3C64XX_SROMREG(x) (S3C_VA_MEM + (x))
......@@ -29,7 +28,7 @@
#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT 0
#define S3C64XX_SROM_BW__WAITENABLE__SHIFT 2
#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT 3
#define S3C64XX_SROM_BW__CS_MASK 0xf
#define S3C64XX_SROM_BW__CS_MASK 0xf
#define S3C64XX_SROM_BW__NCS0__SHIFT 0
#define S3C64XX_SROM_BW__NCS1__SHIFT 4
......@@ -56,4 +55,4 @@
#define S3C64XX_SROM_BCX__TACS__SHIFT 28
#define S3C64XX_SROM_BCX__TACS__MASK 0xf
#endif /* _PLAT_REGS_SROM_H */
#endif /* __MACH_S3C64XX_REGS_SROM_H */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment