Commit 9a3acd8c authored by Vinod Govindapillai's avatar Vinod Govindapillai Committed by Jouni Högander

drm/i915/xe2lpd: display capability register definitions

Register definitions to track the reported scalable display
feature configurations

Bspec: 71161
Signed-off-by: default avatarVinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: default avatarJouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231001113155.80659-2-vinod.govindapillai@intel.comSigned-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
parent 55ce2c37
......@@ -4680,6 +4680,13 @@
#define TGL_DFSM_PIPE_D_DISABLE (1 << 22)
#define GLK_DFSM_DISPLAY_DSC_DISABLE (1 << 7)
#define XE2LPD_DE_CAP _MMIO(0x41100)
#define XE2LPD_DE_CAP_3DLUT_MASK REG_GENMASK(31, 30)
#define XE2LPD_DE_CAP_DSC_MASK REG_GENMASK(29, 28)
#define XE2LPD_DE_CAP_DSC_REMOVED 1
#define XE2LPD_DE_CAP_SCALER_MASK REG_GENMASK(27, 26)
#define XE2LPD_DE_CAP_SCALER_SINGLE 1
#define SKL_DSSM _MMIO(0x51004)
#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK (7 << 29)
#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz (0 << 29)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment